From owner-svn-src-stable@freebsd.org Wed Nov 4 14:12:30 2020 Return-Path: Delivered-To: svn-src-stable@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 55C4945DB32; Wed, 4 Nov 2020 14:12:30 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4CR7rt1dqQz3Y2p; Wed, 4 Nov 2020 14:12:30 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 01C91EC2E; Wed, 4 Nov 2020 14:12:30 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 0A4ECTbZ017054; Wed, 4 Nov 2020 14:12:29 GMT (envelope-from mav@FreeBSD.org) Received: (from mav@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 0A4ECTvo017052; Wed, 4 Nov 2020 14:12:29 GMT (envelope-from mav@FreeBSD.org) Message-Id: <202011041412.0A4ECTvo017052@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mav set sender to mav@FreeBSD.org using -f From: Alexander Motin Date: Wed, 4 Nov 2020 14:12:29 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r367329 - stable/12/sys/dev/nvme X-SVN-Group: stable-12 X-SVN-Commit-Author: mav X-SVN-Commit-Paths: stable/12/sys/dev/nvme X-SVN-Commit-Revision: 367329 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Nov 2020 14:12:30 -0000 Author: mav Date: Wed Nov 4 14:12:29 2020 New Revision: 367329 URL: https://svnweb.freebsd.org/changeset/base/367329 Log: MFC r367109, r367113: Print NVMe controller capabilities in verbose dmesg. Those values are not reported in controller identification, while sometimes interesting for development and debugging. Modified: stable/12/sys/dev/nvme/nvme.h stable/12/sys/dev/nvme/nvme_ctrlr.c Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/nvme/nvme.h ============================================================================== --- stable/12/sys/dev/nvme/nvme.h Wed Nov 4 13:43:34 2020 (r367328) +++ stable/12/sys/dev/nvme/nvme.h Wed Nov 4 14:12:29 2020 (r367329) @@ -84,6 +84,8 @@ #define NVME_CAP_HI_REG_DSTRD_MASK (0xF) #define NVME_CAP_HI_REG_NSSRS_SHIFT (4) #define NVME_CAP_HI_REG_NSSRS_MASK (0x1) +#define NVME_CAP_HI_REG_CSS_SHIFT (5) +#define NVME_CAP_HI_REG_CSS_MASK (0xff) #define NVME_CAP_HI_REG_CSS_NVM_SHIFT (5) #define NVME_CAP_HI_REG_CSS_NVM_MASK (0x1) #define NVME_CAP_HI_REG_BPS_SHIFT (13) @@ -98,12 +100,22 @@ #define NVME_CAP_HI_REG_CMBS_MASK (0x1) #define NVME_CAP_HI_DSTRD(x) \ (((x) >> NVME_CAP_HI_REG_DSTRD_SHIFT) & NVME_CAP_HI_REG_DSTRD_MASK) +#define NVME_CAP_HI_NSSRS(x) \ + (((x) >> NVME_CAP_HI_REG_NSSRS_SHIFT) & NVME_CAP_HI_REG_NSSRS_MASK) +#define NVME_CAP_HI_CSS(x) \ + (((x) >> NVME_CAP_HI_REG_CSS_SHIFT) & NVME_CAP_HI_REG_CSS_MASK) #define NVME_CAP_HI_CSS_NVM(x) \ (((x) >> NVME_CAP_HI_REG_CSS_NVM_SHIFT) & NVME_CAP_HI_REG_CSS_NVM_MASK) +#define NVME_CAP_HI_BPS(x) \ + (((x) >> NVME_CAP_HI_REG_BPS_SHIFT) & NVME_CAP_HI_REG_BPS_MASK) #define NVME_CAP_HI_MPSMIN(x) \ (((x) >> NVME_CAP_HI_REG_MPSMIN_SHIFT) & NVME_CAP_HI_REG_MPSMIN_MASK) #define NVME_CAP_HI_MPSMAX(x) \ (((x) >> NVME_CAP_HI_REG_MPSMAX_SHIFT) & NVME_CAP_HI_REG_MPSMAX_MASK) +#define NVME_CAP_HI_PMRS(x) \ + (((x) >> NVME_CAP_HI_REG_PMRS_SHIFT) & NVME_CAP_HI_REG_PMRS_MASK) +#define NVME_CAP_HI_CMBS(x) \ + (((x) >> NVME_CAP_HI_REG_CMBS_SHIFT) & NVME_CAP_HI_REG_CMBS_MASK) #define NVME_CC_REG_EN_SHIFT (0) #define NVME_CC_REG_EN_MASK (0x1) Modified: stable/12/sys/dev/nvme/nvme_ctrlr.c ============================================================================== --- stable/12/sys/dev/nvme/nvme_ctrlr.c Wed Nov 4 13:43:34 2020 (r367328) +++ stable/12/sys/dev/nvme/nvme_ctrlr.c Wed Nov 4 14:12:29 2020 (r367329) @@ -1329,7 +1329,7 @@ nvme_ctrlr_construct(struct nvme_controller *ctrlr, de struct make_dev_args md_args; uint32_t cap_lo; uint32_t cap_hi; - uint32_t to; + uint32_t to, vs; uint8_t mpsmin; int status, timeout_period; @@ -1339,14 +1339,41 @@ nvme_ctrlr_construct(struct nvme_controller *ctrlr, de if (bus_get_domain(dev, &ctrlr->domain) != 0) ctrlr->domain = 0; + cap_lo = nvme_mmio_read_4(ctrlr, cap_lo); + if (bootverbose) { + device_printf(dev, "CapLo: 0x%08x: MQES %u%s%s%s%s, TO %u\n", + cap_lo, NVME_CAP_LO_MQES(cap_lo), + NVME_CAP_LO_CQR(cap_lo) ? ", CQR" : "", + NVME_CAP_LO_AMS(cap_lo) ? ", AMS" : "", + (NVME_CAP_LO_AMS(cap_lo) & 0x1) ? " WRRwUPC" : "", + (NVME_CAP_LO_AMS(cap_lo) & 0x2) ? " VS" : "", + NVME_CAP_LO_TO(cap_lo)); + } cap_hi = nvme_mmio_read_4(ctrlr, cap_hi); + if (bootverbose) { + device_printf(dev, "CapHi: 0x%08x: DSTRD %u%s, CSS %x%s, " + "MPSMIN %u, MPSMAX %u %s%s\n", cap_hi, + NVME_CAP_HI_DSTRD(cap_hi), + NVME_CAP_HI_NSSRS(cap_lo) ? ", NSSRS" : "", + NVME_CAP_HI_CSS(cap_hi), + NVME_CAP_HI_BPS(cap_lo) ? ", BPS" : "", + NVME_CAP_HI_MPSMIN(cap_hi), + NVME_CAP_HI_MPSMAX(cap_hi), + NVME_CAP_HI_PMRS(cap_lo) ? ", PMRS" : "", + NVME_CAP_HI_CMBS(cap_lo) ? ", CMBS" : ""); + } + if (bootverbose) { + vs = nvme_mmio_read_4(ctrlr, vs); + device_printf(dev, "Version: 0x%08x: %d.%d\n", vs, + NVME_MAJOR(vs), NVME_MINOR(vs)); + } + ctrlr->dstrd = NVME_CAP_HI_DSTRD(cap_hi) + 2; mpsmin = NVME_CAP_HI_MPSMIN(cap_hi); ctrlr->min_page_size = 1 << (12 + mpsmin); /* Get ready timeout value from controller, in units of 500ms. */ - cap_lo = nvme_mmio_read_4(ctrlr, cap_lo); to = NVME_CAP_LO_TO(cap_lo) + 1; ctrlr->ready_timeout_in_ms = to * 500;