From nobody Mon Jul 31 12:59:03 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4RDyx844FRz4q6n3; Mon, 31 Jul 2023 12:59:03 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4RDyx320cBz40tc; Mon, 31 Jul 2023 12:59:03 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1690808343; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=hWXwfkToo+UcuvREysqG+vWV+XJ2PaBhn9oaqpewl6A=; b=WZBEXEK4bGk1DBeMAz68qA99r9lAZ+LAcwu2HmthQ8lmPCIq9tTJXvpTrgN6EN7Q/cD6bz 6ZF4nlHiPcMkAgGJd/Esox1W3lzVMg9HBPBTruQ91i8vkSgB4+6ff/ZycDjrjDiAQ0qXYt BiKVLHXSWtN8d7ArUCjXSxerOLHkiCSr4uDfQAF9HtrHsCc52R6i2TzVtC5sms3wARFTOH ALblXrNHWKhJmSKjDnuDUZvH4bsQS1lPr3xEMYgzhaz2/QkcxY8s3E7/FfDzUhFebkelh2 NB9+ZxTPZZ2xmsQ2+5+hS1urRIgoUizqBmWL8xTmECFc3iCJFYNfTOri4AsT2g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1690808343; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=hWXwfkToo+UcuvREysqG+vWV+XJ2PaBhn9oaqpewl6A=; b=JMWmn4meZY09I8tNSzg4qk9aCkI45E3y7mPylteWQF8h+Qcg77sgQSinGrYCrOzAiFor2u 9QzEW4rRZNgxYjwXQY5SPI5wMaFfnFvcwF+B3oJkYV2bfDoHVuUjIE7Swy4SLkFJ7+T2PQ 9uUVfQn45HOmgSduOwHVtaPfh9Ni40e27GF+GcbW242Gi4N9wzX01zwY4T/DZ3U+qB/xkL KlrdcgDhIU3TFIy9G27sRTeKQmdi46xULvTE9obKYRmKAlWiu8chQFcb3PzH264z62x3Fm lLBikWpPZrkXtu9vdR/NWkMoMpsCCoPQNQvpVZ2ZEkKk0sne90ZBSLoya7HvDw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1690808343; a=rsa-sha256; cv=none; b=sbs38aISwnALbgIiUuxSKITndhLxcHCmLycwcPnjrbslYnGvx0t2jHJpTaxRImGFtWjRLi Bxy9FLL9WTL4qOOjZ5FhPfQl6iSasCQxVeDrQ+Qvb/JPNgNOwJa3t5J+JOJhSbRYxL3tDy NyZgKc6e7wuCy2M9waqHztnlAySNJs+EpsXNlKc8+vc3shm3hKsXr3mC3JmFgdaGJwXQml 81KVZtnfUHDspEyzfK/+oxRzVA+T3iBsR12PjDbN/2yg0N28DZ8EJGBi42Ej3caUaAFl2f fh3J0qCCxXe5rirx1OyLWx7eJG372/NOJYNslqPegxSEQBAjahTp4OrLxjnwtw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4RDyx30mnMzwdY; Mon, 31 Jul 2023 12:59:03 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 36VCx3K0093885; Mon, 31 Jul 2023 12:59:03 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 36VCx3Eu093884; Mon, 31 Jul 2023 12:59:03 GMT (envelope-from git) Date: Mon, 31 Jul 2023 12:59:03 GMT Message-Id: <202307311259.36VCx3Eu093884@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Mitchell Horne Subject: git: 193aeedc9b66 - stable/13 - arm64/disassem.c: add extended register instruction definitions List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 193aeedc9b66d759148d51b97610ec4558569aae Auto-Submitted: auto-generated The branch stable/13 has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=193aeedc9b66d759148d51b97610ec4558569aae commit 193aeedc9b66d759148d51b97610ec4558569aae Author: Mykola Hohsadze AuthorDate: 2023-07-24 20:49:24 +0000 Commit: Mitchell Horne CommitDate: 2023-07-31 12:54:01 +0000 arm64/disassem.c: add extended register instruction definitions Add disassembly support for the following extended register instructions: add, adds, sub, subs, cmp, cmn. Reviewed by: mhorne MFC after: 1 week Pull Request: https://reviews.freebsd.org/D40967 (cherry picked from commit 4a07c778632bddb86a82f3e1fe144d889dae69c5) --- sys/arm64/arm64/disassem.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) diff --git a/sys/arm64/arm64/disassem.c b/sys/arm64/arm64/disassem.c index c1e38266a2e0..a86fef1d96a6 100644 --- a/sys/arm64/arm64/disassem.c +++ b/sys/arm64/arm64/disassem.c @@ -73,6 +73,11 @@ static const char *shift_2[] = { "lsl", "lsr", "asr", "ror" }; +static const char *extend_types[] = { + "uxtb", "uxth", "uxtw", "uxtx", + "sxtb", "sxth", "sxtw", "sxtx", +}; + /* * Structure representing single token (operand) inside instruction. * name - name of operand @@ -107,6 +112,12 @@ enum arm64_format_type { /* OP , #imm SF32/64 */ TYPE_03, + + /* + * OP , , {, { # } } + * OP , , {, { # } } + */ + TYPE_04, }; /* @@ -260,6 +271,18 @@ static struct arm64_insn arm64_i[] = { TYPE_01, OP_SHIFT_ROR }, /* eon shifted register */ { "eor", "SF(1)|1001010|SHIFT(2)|0|RM(5)|IMM(6)|RN(5)|RD(5)", TYPE_01, OP_SHIFT_ROR }, /* eor shifted register */ + { "add", "SF(1)|0001011001|RM(5)|OPTION(3)|IMM(3)|RN(5)|RD(5)", + TYPE_04, OP_RD_SP }, /* add extended register */ + { "cmn", "SF(1)|0101011001|RM(5)|OPTION(3)|IMM(3)|RN(5)|11111", + TYPE_04, 0 }, /* cmn extended register */ + { "adds", "SF(1)|0101011001|RM(5)|OPTION(3)|IMM(3)|RN(5)|RD(5)", + TYPE_04, 0 }, /* adds extended register */ + { "sub", "SF(1)|1001011001|RM(5)|OPTION(3)|IMM(3)|RN(5)|RD(5)", + TYPE_04, OP_RD_SP }, /* sub extended register */ + { "cmp", "SF(1)|1101011001|RM(5)|OPTION(3)|IMM(3)|RN(5)|11111", + TYPE_04, 0 }, /* cmp extended register */ + { "subs", "SF(1)|1101011001|RM(5)|OPTION(3)|IMM(3)|RN(5)|RD(5)", + TYPE_04, 0 }, /* subs extended register */ { NULL, NULL } }; @@ -408,6 +431,27 @@ arm64_disasm_read_token_sign_ext(struct arm64_insn *insn, u_int opcode, return (EINVAL); } +static const char * +arm64_disasm_reg_extend(int sf, int option, int rd, int rn, int amount) +{ + bool is_sp, lsl_preferred_uxtw, lsl_preferred_uxtx, lsl_preferred; + + is_sp = rd == 31 || rn == 31; + lsl_preferred_uxtw = sf == 0 && option == 2; + lsl_preferred_uxtx = sf == 1 && option == 3; + lsl_preferred = is_sp && (lsl_preferred_uxtw || lsl_preferred_uxtx); + + /* + * LSL may be omitted when is 0. + * In all other cases is required. + */ + if (lsl_preferred && amount == 0) + return (NULL); + if (lsl_preferred) + return ("lsl"); + return (extend_types[option]); +} + static const char * arm64_w_reg(int num, int wsp) { @@ -432,6 +476,18 @@ arm64_reg(int b64, int num, int sp) return (arm64_w_reg(num, sp)); } +/* + * Decodes OPTION(3) to get register or + * for extended register instruction. + */ +static const char * +arm64_disasm_reg_width(int option, int reg) +{ + if (option == 3 || option == 7) + return (arm64_x_reg(reg, 0)); + return (arm64_w_reg(reg, 0)); +} + vm_offset_t disasm(const struct disasm_interface *di, vm_offset_t loc, int altfmt) { @@ -451,10 +507,13 @@ disasm(const struct disasm_interface *di, vm_offset_t loc, int altfmt) /* Indicate if shift type ror is supported */ bool has_shift_ror; + const char *extend; + /* Initialize defaults, all are 0 except SF indicating 64bit access */ shift = rd = rm = rn = imm = idx = option = amount = scale = 0; sign_ext = 0; sf = 1; + extend = NULL; matchp = 0; insn = di->di_readword(loc); @@ -669,6 +728,37 @@ disasm(const struct disasm_interface *di, vm_offset_t loc, int altfmt) di->di_printf("#%d", imm); break; + + case TYPE_04: + /* + * OP , , {, { # } } + * OP , , {, { # } } + */ + + arm64_disasm_read_token(i_ptr, insn, "RN", &rn); + arm64_disasm_read_token(i_ptr, insn, "RM", &rm); + arm64_disasm_read_token(i_ptr, insn, "OPTION", &option); + + rd_absent = arm64_disasm_read_token(i_ptr, insn, "RD", &rd); + extend = arm64_disasm_reg_extend(sf, option, rd, rn, imm); + + di->di_printf("%s\t", i_ptr->name); + + if (!rd_absent) + di->di_printf("%s, ", arm64_reg(sf, rd, rd_sp)); + + di->di_printf("%s, ", arm64_reg(sf, rn, 1)); + + if (sf != 0) + di->di_printf("%s", + arm64_disasm_reg_width(option, rm)); + else + di->di_printf("%s", arm64_w_reg(rm, 0)); + + if (extend != NULL) + di->di_printf(", %s #%d", extend, imm); + + break; default: goto undefined; }