From owner-svn-soc-all@FreeBSD.ORG Thu Aug 9 12:35:18 2012 Return-Path: Delivered-To: svn-soc-all@FreeBSD.org Received: from socsvn.FreeBSD.org (unknown [IPv6:2001:4f8:fff6::2f]) by hub.freebsd.org (Postfix) with SMTP id 9A38C1065672 for ; Thu, 9 Aug 2012 12:35:16 +0000 (UTC) (envelope-from aleek@FreeBSD.org) Received: by socsvn.FreeBSD.org (sSMTP sendmail emulation); Thu, 09 Aug 2012 12:35:16 +0000 Date: Thu, 09 Aug 2012 12:35:16 +0000 From: aleek@FreeBSD.org To: svn-soc-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Message-Id: <20120809123516.9A38C1065672@hub.freebsd.org> Cc: Subject: socsvn commit: r240209 - in soc2012/aleek/beaglexm-armv6/sys/arm/ti: am37x usb X-BeenThere: svn-soc-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the entire Summer of Code repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Aug 2012 12:35:18 -0000 Author: aleek Date: Thu Aug 9 12:35:15 2012 New Revision: 240209 URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=240209 Log: fix bug in gptimer Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c Thu Aug 9 11:25:18 2012 (r240208) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/am37x/am37x_gptimer_tc.c Thu Aug 9 12:35:15 2012 (r240209) @@ -177,7 +177,7 @@ /* Get a pointer to the individual sc struct */ - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); if (!(sc->flags & OMAP3_GPTIMER_ACTIVATED_FLAG)) { ret = EINVAL; @@ -186,7 +186,7 @@ ret = 0; } - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return (ret); } @@ -212,11 +212,11 @@ if (!(sc->flags & OMAP3_GPTIMER_ACTIVATED_FLAG)) return (EINVAL); - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); gptimer_write_4(OMAP3_GPT_TCRR, cnt); - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return (0); } @@ -257,7 +257,7 @@ return (rc); - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); /* Determine if the pre-scalar is enabled and if so the prescaler value */ tclr = gptimer_read_4(OMAP3_GPT_TCLR); @@ -269,7 +269,7 @@ /* Get the reload count */ tldr = gptimer_read_4(OMAP3_GPT_TLDR); - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); /* Calculate the tick freq */ @@ -335,7 +335,7 @@ return (EINVAL); } - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); /* Enable the functional and interface clock */ if (flags & OMAP3_GPTIMER_32KCLK_FLAG) @@ -451,7 +451,7 @@ /* Finally set the activated flag */ sc->flags |= OMAP3_GPTIMER_ACTIVATED_FLAG; - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return (0); } @@ -475,13 +475,13 @@ if (!(sc->flags & OMAP3_GPTIMER_ACTIVATED_FLAG)) return (EINVAL); - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); val = gptimer_read_4(OMAP3_GPT_TCLR); val |= TCLR_ST; gptimer_write_4(OMAP3_GPT_TCLR, val); - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return 0; } @@ -497,13 +497,13 @@ if (!(sc->flags & OMAP3_GPTIMER_ACTIVATED_FLAG)) return (EINVAL); - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); val = gptimer_read_4(OMAP3_GPT_TCLR); val |= TCLR_ST; gptimer_write_4(OMAP3_GPT_TCLR, val); - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return 0; } @@ -527,13 +527,13 @@ if (!(sc->flags & OMAP3_GPTIMER_ACTIVATED_FLAG)) return (EINVAL); - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); val = gptimer_read_4(OMAP3_GPT_TCLR); val &= ~TCLR_ST; gptimer_write_4(OMAP3_GPT_TCLR, val); - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return 0; } @@ -555,18 +555,18 @@ if (sc == NULL) return (ENOMEM); - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); /* If a callback is already installed this won't work */ if (sc->callback != NULL) { - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return(EINVAL); } /* Sanity check the timer is already activated and periodic type */ if ((sc->flags & (OMAP3_GPTIMER_ACTIVATED_FLAG | OMAP3_GPTIMER_PERIODIC_FLAG)) != (OMAP3_GPTIMER_ACTIVATED_FLAG | OMAP3_GPTIMER_PERIODIC_FLAG)) { - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return(EINVAL); } @@ -575,7 +575,7 @@ if (bus_setup_intr(sc->sc_dev, sc->irq_res, INTR_TYPE_CLK, filter, NULL, NULL, &sc->irq_h)) { device_printf(sc->sc_dev, "Error: failed to activate interrupt\n"); - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return(EINVAL); } @@ -587,7 +587,7 @@ gptimer_write_4(OMAP3_GPT_TIER, val); } - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); return(0); } @@ -607,8 +607,8 @@ { uint32_t stat; - //OMAP3_GPTIMER_LOCK(sc); - + OMAP3_GPTIMER_LOCK(sc); + /* Read the interrupt status flag and clear it */ /* Read the status and it with the enable flag */ stat = gptimer_read_4(OMAP3_GPT_TISR); @@ -616,7 +616,7 @@ /* Clear the status flag */ gptimer_write_4(OMAP3_GPT_TISR, stat); - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); } @@ -668,7 +668,7 @@ void* callback_data; uint32_t stat = 0x0000; - //OMAP3_GPTIMER_LOCK(sc); + OMAP3_GPTIMER_LOCK(sc); /* Read the interrupt status flag and clear it */ if (sc->profile == OMAP_GPTIMER_PROFILE_OMAP3) { @@ -685,7 +685,7 @@ callback = sc->callback; callback_data = sc->callback_data; - //OMAP3_GPTIMER_UNLOCK(sc); + OMAP3_GPTIMER_UNLOCK(sc); /* Check if an actual overflow interrupt */ if ((stat & OVF) && (callback != NULL)) @@ -782,6 +782,7 @@ struct omap3_gptimer_softc *sc = device_get_softc(dev); omap3_gptimer_attach_common(dev); + mtx_init(&sc->mtx, device_get_nameunit(dev), "omap3_gptimer_tc", MTX_SPIN ); /* Set the clock source for the timer, this is just a one to one * mapping of the clock id to timer, i.e. n=0 => GPTIMER1_CLK. */ @@ -858,6 +859,7 @@ struct omap3_gptimer_softc *sc = device_get_softc(dev); omap3_gptimer_attach_common(dev); + mtx_init(&sc->mtx, device_get_nameunit(dev), "omap3_gptimer_et", MTX_SPIN ); /* Set the clock source for the timer, this is just a one to one * mapping of the clock id to timer, i.e. n=0 => GPTIMER1_CLK. */ Modified: soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c ============================================================================== --- soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c Thu Aug 9 11:25:18 2012 (r240208) +++ soc2012/aleek/beaglexm-armv6/sys/arm/ti/usb/omap_ehci.c Thu Aug 9 12:35:15 2012 (r240209) @@ -895,6 +895,7 @@ /* Setup the interrupt */ + device_printf( dev, "%s:%d\n", __func__, __LINE__ ); err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE, NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl); if (err) { @@ -904,8 +905,10 @@ } + device_printf( dev, "%s:%d\n", __func__, __LINE__ ); /* Finally we are ready to kick off the ECHI host controller */ - err = ehci_init(sc); + err = 0; //ehci_init(sc); + device_printf( dev, "%s:%d\n", __func__, __LINE__ ); if (err == 0) { err = device_probe_and_attach(sc->sc_bus.bdev); }