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From: Luiz Otavio O Souza <loos@FreeBSD.org>
Date: Wed, 17 May 2017 22:05:07 +0000 (UTC)
To: src-committers@freebsd.org, svn-src-all@freebsd.org,
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Subject: svn commit: r318428 - head/sys/boot/fdt/dts/arm
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Author: loos
Date: Wed May 17 22:05:07 2017
New Revision: 318428
URL: https://svnweb.freebsd.org/changeset/base/318428

Log:
  Fix the offset for the CPU0 MPIC registers.
  
  Please note that only a subset of CPU0 registers are exported.  CPU1
  registers are not touched.
  
  Obtained from:	ARMADA38X Functional Specifications
  Sponsored by:	Rubicon Communications, LLC (Netgate)

Modified:
  head/sys/boot/fdt/dts/arm/armada-38x.dtsi

Modified: head/sys/boot/fdt/dts/arm/armada-38x.dtsi
==============================================================================
--- head/sys/boot/fdt/dts/arm/armada-38x.dtsi	Wed May 17 21:33:37 2017	(r318427)
+++ head/sys/boot/fdt/dts/arm/armada-38x.dtsi	Wed May 17 22:05:07 2017	(r318428)
@@ -419,7 +419,7 @@
 
 			mpic: interrupt-controller@20a00 {
 				compatible = "marvell,mpic";
-				reg = <0x20a00 0x2d0>, <0x21070 0x58>;
+				reg = <0x20a00 0x2d0>, <0x21870 0x58>;
 				#interrupt-cells = <1>;
 				#size-cells = <1>;
 				interrupt-controller;