From owner-svn-src-head@FreeBSD.ORG Mon Oct 26 20:53:50 2009 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4E047106566B; Mon, 26 Oct 2009 20:53:50 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from asmtpout023.mac.com (asmtpout023.mac.com [17.148.16.98]) by mx1.freebsd.org (Postfix) with ESMTP id 340CE8FC08; Mon, 26 Oct 2009 20:53:49 +0000 (UTC) MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; charset=us-ascii; format=flowed Received: from macbook-pro.jnpr.net (natint3.juniper.net [66.129.224.36]) by asmtp023.mac.com (Sun Java(tm) System Messaging Server 6.3-8.01 (built Dec 16 2008; 32bit)) with ESMTPSA id <0KS5001RK3DO6U60@asmtp023.mac.com>; Mon, 26 Oct 2009 13:53:48 -0700 (PDT) From: Marcel Moolenaar In-reply-to: <20091026201116.GS27159@alchemy.franken.de> Date: Mon, 26 Oct 2009 13:53:47 -0700 Message-id: <63FB238C-D66F-486B-AB5B-DA7C2423A78B@mac.com> References: <200910211838.n9LIc2wp007206@svn.freebsd.org> <20091025202541.GC94979@alchemy.franken.de> <36313C38-9B60-4BF3-885C-5BAAA915DCFE@mac.com> <20091026201116.GS27159@alchemy.franken.de> To: Marius Strobl X-Mailer: Apple Mail (2.1076) Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r198341 - in head/sys: amd64/amd64 arm/arm arm/mv i386/i386 i386/xen ia64/ia64 kern mips/mips powerpc/aim powerpc/booke powerpc/include powerpc/powerpc sparc64/sparc64 sun4v/sun4v vm X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Oct 2009 20:53:50 -0000 On Oct 26, 2009, at 1:11 PM, Marius Strobl wrote: > The cheetah-class CPUs, i.e. USIII and later, take care of > I$ coherency themselves, unlike the spitfire ones (see also > cheetah_icache_page_inval() vs. spitfire_icache_page_inval()). This explains why I didn't see any I-cache coherency issues :-) > I currently can't think of any existing code which would > ensure I$ consistency after the writes have been performed, > not even as a side-effect. The proper solution probalby is to > make pmap_sync_icache() a wrapper around icache_page_inval(). I concur. Do we have any spitfire-based sparc64 boxes in the cluster or do you have one? -- Marcel Moolenaar xcllnt@mac.com