From owner-svn-src-head@freebsd.org Mon Apr 10 12:36:00 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 33889D36446; Mon, 10 Apr 2017 12:36:00 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E9E0F188; Mon, 10 Apr 2017 12:35:59 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v3ACZx4G025365; Mon, 10 Apr 2017 12:35:59 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v3ACZwU2025362; Mon, 10 Apr 2017 12:35:58 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201704101235.v3ACZwU2025362@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Mon, 10 Apr 2017 12:35:58 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r316678 - in head/sys/arm: conf freescale/imx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 10 Apr 2017 12:36:00 -0000 Author: andrew Date: Mon Apr 10 12:35:58 2017 New Revision: 316678 URL: https://svnweb.freebsd.org/changeset/base/316678 Log: Port the IMX6 kernel configuration to use MULTIDELAY. This will help adding the i.MX series of SoCs to the armv6 GENERIC kernel. This uses updated times from ian@. Reviewed by: ian Sponsored by: ABT Systems Ltd Modified: head/sys/arm/conf/IMX6 head/sys/arm/freescale/imx/imx6_machdep.c head/sys/arm/freescale/imx/imx_gpt.c Modified: head/sys/arm/conf/IMX6 ============================================================================== --- head/sys/arm/conf/IMX6 Mon Apr 10 10:38:12 2017 (r316677) +++ head/sys/arm/conf/IMX6 Mon Apr 10 12:35:58 2017 (r316678) @@ -32,6 +32,7 @@ options INCLUDE_CONFIG_FILE # Include t options PLATFORM options PLATFORM_SMP options SMP # Enable multiple cores +options MULTIDELAY # NFS root from boopt/dhcp #options BOOTP Modified: head/sys/arm/freescale/imx/imx6_machdep.c ============================================================================== --- head/sys/arm/freescale/imx/imx6_machdep.c Mon Apr 10 10:38:12 2017 (r316677) +++ head/sys/arm/freescale/imx/imx6_machdep.c Mon Apr 10 12:35:58 2017 (r316678) @@ -324,7 +324,7 @@ static platform_method_t imx6_methods[] PLATFORMMETHOD_END, }; -FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 0); -FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 0); -FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 0); -FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 0); +FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 80); +FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 80); +FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 80); +FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 67); Modified: head/sys/arm/freescale/imx/imx_gpt.c ============================================================================== --- head/sys/arm/freescale/imx/imx_gpt.c Mon Apr 10 10:38:12 2017 (r316677) +++ head/sys/arm/freescale/imx/imx_gpt.c Mon Apr 10 12:35:58 2017 (r316678) @@ -40,6 +40,9 @@ __FBSDID("$FreeBSD$"); #include #include #include +#ifdef MULTIDELAY +#include /* For arm_set_delay */ +#endif #include #include @@ -62,6 +65,8 @@ static int imx_gpt_timer_start(struct ev sbintime_t); static int imx_gpt_timer_stop(struct eventtimer *); +static void imx_gpt_do_delay(int, void *); + static int imx_gpt_intr(void *); static int imx_gpt_probe(device_t); static int imx_gpt_attach(device_t); @@ -87,6 +92,7 @@ struct imx_gpt_softc { struct eventtimer et; }; +#ifndef MULTIDELAY /* Global softc pointer for use in DELAY(). */ static struct imx_gpt_softc *imx_gpt_sc; @@ -98,6 +104,7 @@ static struct imx_gpt_softc *imx_gpt_sc; * we're attached the delay loop switches to using the timer hardware. */ static const int imx_gpt_delay_count = 78; +#endif /* Try to divide down an available fast clock to this frequency. */ #define TARGET_FREQUENCY 1000000000 @@ -275,8 +282,13 @@ imx_gpt_attach(device_t dev) tc_init(&imx_gpt_timecounter); /* If this is the first unit, store the softc for use in DELAY. */ - if (device_get_unit(dev) == 0) - imx_gpt_sc = sc; + if (device_get_unit(dev) == 0) { +#ifdef MULTIDELAY + arm_set_delay(imx_gpt_do_delay, sc); +#else + imx_gpt_sc = sc; +#endif + } return (0); } @@ -396,19 +408,12 @@ static devclass_t imx_gpt_devclass; EARLY_DRIVER_MODULE(imx_gpt, simplebus, imx_gpt_driver, imx_gpt_devclass, 0, 0, BUS_PASS_TIMER); -void -DELAY(int usec) +static void +imx_gpt_do_delay(int usec, void *arg) { + struct imx_gpt_softc *sc = arg; uint64_t curcnt, endcnt, startcnt, ticks; - /* If the timer hardware is not accessible, just use a loop. */ - if (imx_gpt_sc == NULL) { - while (usec-- > 0) - for (ticks = 0; ticks < imx_gpt_delay_count; ++ticks) - cpufunc_nullop(); - return; - } - /* * Calculate the tick count with 64-bit values so that it works for any * clock frequency. Loop until the hardware count reaches start+ticks. @@ -417,12 +422,30 @@ DELAY(int usec) * that doing this on each loop iteration is inefficient -- we're trying * to waste time here. */ - ticks = 1 + ((uint64_t)usec * imx_gpt_sc->clkfreq) / 1000000; - curcnt = startcnt = READ4(imx_gpt_sc, IMX_GPT_CNT); + ticks = 1 + ((uint64_t)usec * sc->clkfreq) / 1000000; + curcnt = startcnt = READ4(sc, IMX_GPT_CNT); endcnt = startcnt + ticks; while (curcnt < endcnt) { - curcnt = READ4(imx_gpt_sc, IMX_GPT_CNT); + curcnt = READ4(sc, IMX_GPT_CNT); if (curcnt < startcnt) curcnt += 1ULL << 32; } } + +#ifndef MULTIDELAY +void +DELAY(int usec) +{ + uint64_t ticks; + + /* If the timer hardware is not accessible, just use a loop. */ + if (imx_gpt_sc == NULL) { + while (usec-- > 0) + for (ticks = 0; ticks < imx_gpt_delay_count; ++ticks) + cpufunc_nullop(); + return; + } else + imx_gpt_do_delay(usec, imx_gpt_sc); + +} +#endif