Date: Thu, 22 Jan 2009 16:46:33 +0200 From: Krassimir Slavchev <krassi@bulinfo.net> To: ticso@cicely.de Cc: Alexander Motin <mav@FreeBSD.org>, freebsd-arm@FreeBSD.org Subject: Re: Mount root from SD card? Message-ID: <497886C9.3020907@bulinfo.net> In-Reply-To: <20090122142015.GC50103@cicely7.cicely.de> References: <20090121.100533.-1955669401.imp@bsdimp.com> <20090121.101459.2022307528.imp@bsdimp.com> <49776734.8030805@FreeBSD.org> <20090121.122842.-1582190967.imp@bsdimp.com> <20090122105650.GB50103@cicely7.cicely.de> <49787314.3070004@FreeBSD.org> <20090122142015.GC50103@cicely7.cicely.de>
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-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 I have added a loop to read (256 times) the receive register (MCI_RDR) right before DMA setup for reading. Here is the result: http://mnemonic.bulinfo.net/~krassi/ARM/sd.dump2 Best Regards Bernd Walter wrote: > On Thu, Jan 22, 2009 at 03:22:28PM +0200, Alexander Motin wrote: >> Bernd Walter wrote: >>> On Wed, Jan 21, 2009 at 12:28:42PM -0700, M. Warner Losh wrote: >>> Havn't read everything, so maybe I writing nonsense in respect to >>> this problem. >>> The multiblock read trouble is a problem in the MMC design. >>> The first read always works fine, but you need to stop the transfer >>> and an exact time, otherwise it starts reading the next block. >>> The first bytes of the next block then stucks in the DMA fifo and >>> the next read then starts with the stuck uint32. >>> If you see broken reads like this then I would assume the previous >>> command was problematic. >>> The official workaround to get multiblock reading is to reset the MMC >>> and clean the fifo after each multiblock command, but I would assume >>> it is enough to just read the data register a few time before setting >>> up the DMA for the new request. >> Haven't look deep at that arm controller operation, but standard SD host >> has special counter register which terminates DMA transfer after >> specified amount of blocks. sdhci driver even uses it's Auth-CMD12 >> feature, where controller even sends STOP command to the card by itself. >> > > Yes - and this is broken in the Atmel design. > This is not the only nasty bug that Atmel has left int he chip. > You need to issue the STOP command at the absolut right timing, which > is more or less impossible. > The design puts every 32bit word in a receive register, which has a small > fifo. > You can setup a DMA enginge to pull the words from the register into RAM. > Now what happens is that if you issue the STOP too late it starts reading > the next block and then stops - the card can stop at every location, so > there is no problem about this, but now you have the first words in the > receive fifo. > The DMA doesn't work anymore, because it was setup with a limited number > of words to pull, so the additional words are kept in the register. > Once you start reading the next block and setup the DMA it pulls the > stuck words first. > It that case it looks as if the timing is one word too late therefor > you get 4 additonal bytes after each transaction. > It shouldn't be a problem to read the receive register without data in > it, so 4 or 5 dummy reads befor DMA setup should be enough. > IIRC the fifo can only hold up to 3 words. > -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.7 (FreeBSD) iD8DBQFJeIbJxJBWvpalMpkRAoyiAJ498TG0ZB+aIoz66ZMQ08C3RxQ8YQCfSoL0 AA+/Up5DcZCzX7b+sz0PXk0= =pLAx -----END PGP SIGNATURE-----
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