Date: Sat, 21 Oct 2023 14:47:16 GMT From: Zhenlei Huang <zlei@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: a72ab19000bd - stable/13 - amd64: Fix two typos of loader tunables Message-ID: <202310211447.39LElGli006070@gitrepo.freebsd.org>
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The branch stable/13 has been updated by zlei: URL: https://cgit.FreeBSD.org/src/commit/?id=a72ab19000bd4b0a0c7ae0b69f8cf92343c73b95 commit a72ab19000bd4b0a0c7ae0b69f8cf92343c73b95 Author: Zhenlei Huang <zlei@FreeBSD.org> AuthorDate: 2023-10-19 15:23:33 +0000 Commit: Zhenlei Huang <zlei@FreeBSD.org> CommitDate: 2023-10-21 14:45:45 +0000 amd64: Fix two typos of loader tunables To match the sysctl MIBs and document entries in security(7). Fixes: 2dec2b4a34b4 amd64: flush L1 data cache on syscall return with an error Fixes: 17edf152e556 Control for Special Register Buffer Data Sampling mitigation Reviewed by: kib MFC after: 1 day Differential Revision: https://reviews.freebsd.org/D42249 (cherry picked from commit afbb8041a0633c97acb51ac895c9ae3cde4fe540) (cherry picked from commit 032a0b44541ffb669a4553105c6f6343ab4e3a67) --- sys/amd64/amd64/machdep.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/amd64/amd64/machdep.c b/sys/amd64/amd64/machdep.c index 145d373b1117..b0b7824c4b4b 100644 --- a/sys/amd64/amd64/machdep.c +++ b/sys/amd64/amd64/machdep.c @@ -1486,7 +1486,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree) TUNABLE_INT_FETCH("hw.spec_store_bypass_disable", &hw_ssb_disable); TUNABLE_INT_FETCH("machdep.mitigations.ssb.disable", &hw_ssb_disable); - TUNABLE_INT_FETCH("machdep.syscall_ret_l1d_flush", + TUNABLE_INT_FETCH("machdep.syscall_ret_flush_l1d", &syscall_ret_l1d_flush_mode); TUNABLE_INT_FETCH("hw.mds_disable", &hw_mds_disable); @@ -1494,7 +1494,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree) TUNABLE_INT_FETCH("machdep.mitigations.taa.enable", &x86_taa_enable); - TUNABLE_INT_FETCH("machdep.mitigations.rndgs.enable", + TUNABLE_INT_FETCH("machdep.mitigations.rngds.enable", &x86_rngds_mitg_enable); finishidentcpu(); /* Final stage of CPU initialization */
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