Date: Thu, 17 Jul 1997 08:09:38 -0700 (PDT) From: Chris Browning <cbrown@aracnet.com> To: peter@spinner.dialix.com.au (Peter Wemm) Cc: smp@csn.net, listuser@h2o.journey.net, chuckr@Glue.umd.edu, smp@FreeBSD.ORG Subject: Re: HEADS UP: EISA cards. Message-ID: <199707171509.IAA13319@shelob.aracnet.com> In-Reply-To: <199707170748.PAA25589@spinner.dialix.com.au> from "Peter Wemm" at Jul 17, 97 03:48:55 pm
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> > eliminate the "song and dance" I go thru using the vec[] array and the > > indirections thru it to get to the hardware resumption routines. > > This may well be why intel designed the PR440FX board to NOT have an IO APIC > > pin 2 connection to the timer. > > They dont??? I thought the ones we were using did have the connection.. > Hmm.. I see what you mean. > > Anyway, I think the reason it's not done is in order to support an extra > steerable IDE interrupt (irq 15) with a limited number of pins on the > chip package. After all, we all know how much the Wintel crowd love IDE. > Dont forget the boards also have an ISA PNP Crystal SB16-clone chip > onboard, how's that for priorities for a high-performance server board... The PR440FX is NOT a server board. It was designed by the desktop group as a "workstation" like board. This is why it has a built-in NIC, Sound, and SCSI. It is missing serveral of the features I would consider necessary to perform as a "high performance" server board (only 512MB of mem, only 1 PCI bus, etc.) Chris Not speaking for Intel
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