Date: Tue, 29 Mar 2005 21:11:07 +1000 From: Peter Jeremy <PeterJeremy@optushome.com.au> To: David Leimbach <dleimbac@gmail.com> Cc: hackers@freebsd.org Subject: Re: Fwd: 5-STABLE kernel build with icc broken Message-ID: <20050329111107.GD69824@cirb503493.alcatel.com.au> In-Reply-To: <5bbfe7d405032823232103d537@mail.gmail.com> References: <423C15C5.6040902@fsn.hu> <20050327133059.3d68a78c@Magellan.Leidinger.net> <20050327134044.GM78512@silverwraith.com> <20050327162839.2fafa6aa@Magellan.Leidinger.net> <5bbfe7d405032823144fc1af7b@mail.gmail.com> <5bbfe7d405032823232103d537@mail.gmail.com>
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On Mon, 2005-Mar-28 23:23:19 -0800, David Leimbach wrote: >meant to send this to the list too... sorry >> Are you implying DragonFly uses FPU/SIMD? For that matter does any kernel? > >I believe it does use SIMD for some of it's fast memcopy stuff for >it's messaging system >actually. I remember Matt saying he was working on it. > >http://leaf.dragonflybsd.org/mailarchive/kernel/2004-04/msg00262.html That's almost a year ago and specifically for the amd64. Does anyone know what the results were? >If you can manage the alignment issues it can be a huge win. For message passing within the kernel, you should be able to mandate alignment as part of the API. I see the bigger issue being the need to save/restore the SIMD engine's state during a system call. Currently, this is only saved on if a different process wants to use the SIMD engine. For MMX, the SIMD state is the FPU state - which is non-trivial. The little reading I've done suggests that SSE and SSE2 are even larger. Saving the SIMD state would be more expensive that using integer registers for small (and probably medium-sized) copies. -- Peter Jeremy
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