From owner-freebsd-arm@freebsd.org Tue Jun 2 14:55:50 2020 Return-Path: Delivered-To: freebsd-arm@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 9BA592F10FB for ; Tue, 2 Jun 2020 14:55:50 +0000 (UTC) (envelope-from freebsd@cyclaero.com) Received: from mo4-p00-ob.smtp.rzone.de (mo4-p00-ob.smtp.rzone.de [85.215.255.20]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (2048 bits) client-digest SHA256) (Client CN "*.smtp.rzone.de", Issuer "TeleSec ServerPass Class 2 CA" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 49bw8N5b1Bz43SZ; Tue, 2 Jun 2020 14:55:48 +0000 (UTC) (envelope-from freebsd@cyclaero.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1591109746; s=strato-dkim-0002; d=cyclaero.com; h=To:References:Message-Id:Cc:Date:In-Reply-To:From:Subject: X-RZG-CLASS-ID:X-RZG-AUTH:From:Subject:Sender; bh=18GqW0XeTbAFPT4bjoWCmb5w7KiefveRXNY/GOzNe+E=; b=HT5zsW8ATf5ZFMCRCdPJQwB+CfvAW8bd9xy1fZvQWxaLTfTbW9gUbUgnaK4Ggvog/B 6bK/tY4Me2h++DhpGlaNnU8fwu/awtDZcMRaTvlDuze/1txsSpqpgWdjg8PLgXOarIX4 3HqMwhB/dJLof0aQwxdAMiY/RcvBUir2pkOgHLIs149CoETZ49vre6g/1zTGhDFuanhz nXY8POg0Ccv0vBRfuOc+BN8n8E48MSR5T0JPd6RF4RVT0jsXTUtNtqQdbsmbQqRztwkB acaXCIgim3LjtPxbkXeUocVNR25QBdAVt6zpKGABp9BWw4ojd0iQFYBHd1G9AaDgPujq wEXQ== X-RZG-AUTH: ":O2kGeEG7b/pS1F2rRHW2isrKl4DV03XBEi+I6ZuztdvN9wS3wFGySS4Lw+ldTBio0dVbInGjc9PbZFAm0A==" X-RZG-CLASS-ID: mo00 Received: from mail.obsigna.com by smtp.strato.de (RZmta 46.9.0 DYNA|AUTH) with ESMTPSA id I06cf5w52EtkOba (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256 bits)) (Client did not present a certificate); Tue, 2 Jun 2020 16:55:46 +0200 (CEST) Received: from rolf-mini.obsigna.com (rolf-mini.obsigna.com [192.168.222.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.obsigna.com (Postfix) with ESMTPSA id 53CBD1350F91D; Tue, 2 Jun 2020 11:55:41 -0300 (-03) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 12.4 \(3445.104.11\)) Subject: Re: BeagleBone AI From: "Dr. Rolf Jansen" In-Reply-To: <840faedfcf7c3c09a372cf566acddd8ad876ff2b.camel@freebsd.org> Date: Tue, 2 Jun 2020 11:55:40 -0300 Cc: freebsd-arm@freebsd.org Content-Transfer-Encoding: quoted-printable Message-Id: <5299B3F7-1C95-4769-9701-F13699FE355C@cyclaero.com> References: <966c33ea1924c2cfab5d9e295a9239d134e03f8a.camel@freebsd.org> <3CA84BA5-FEA8-4BD8-A713-C794139170EE@cyclaero.com> <840faedfcf7c3c09a372cf566acddd8ad876ff2b.camel@freebsd.org> To: Ian Lepore X-Mailer: Apple Mail (2.3445.104.11) X-Rspamd-Queue-Id: 49bw8N5b1Bz43SZ X-Spamd-Bar: - Authentication-Results: mx1.freebsd.org; dkim=pass header.d=cyclaero.com header.s=strato-dkim-0002 header.b=HT5zsW8A; dmarc=none; spf=pass (mx1.freebsd.org: domain of freebsd@cyclaero.com designates 85.215.255.20 as permitted sender) smtp.mailfrom=freebsd@cyclaero.com X-Spamd-Result: default: False [-1.48 / 15.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; R_DKIM_ALLOW(-0.20)[cyclaero.com:s=strato-dkim-0002]; NEURAL_HAM_MEDIUM(-0.98)[-0.979]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; MV_CASE(0.50)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; MIME_GOOD(-0.10)[text/plain]; R_SPF_ALLOW(-0.20)[+ip4:85.215.255.0/24]; DMARC_NA(0.00)[cyclaero.com]; NEURAL_HAM_LONG(-1.06)[-1.062]; RCVD_COUNT_THREE(0.00)[3]; DKIM_TRACE(0.00)[cyclaero.com:+]; RCPT_COUNT_TWO(0.00)[2]; RCVD_IN_DNSWL_NONE(0.00)[85.215.255.20:from]; FROM_NAME_HAS_TITLE(1.00)[dr]; NEURAL_HAM_SHORT(-0.44)[-0.442]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; RWL_MAILSPIKE_VERYGOOD(0.00)[85.215.255.20:from]; ASN(0.00)[asn:6724, ipnet:85.215.255.0/24, country:DE]; RCVD_TLS_ALL(0.00)[]; MID_RHS_MATCH_FROM(0.00)[] X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Jun 2020 14:55:50 -0000 > Am 02.06.2020 um 10:49 schrieb Ian Lepore : >=20 > On Sun, 2020-05-31 at 16:56 -0300, Dr. Rolf Jansen wrote: >>> Am 31.05.2020 um 14:11 schrieb Ian Lepore : >>>=20 >>> On Fri, 2020-05-29 at 23:21 -0300, Dr. Rolf Jansen wrote: >>>> ... >>>>=20 >>>> First Question: >>>>=20 >>>> What modern SBC with more than 1 I=C2=B2C bus and which can run >>>> FreeBSD 13++ would you suggest? >>>>=20 >>>> ... >>>>=20 >>>> Two more Questions: >>>>=20 >>>> Is it reasonable to assume that FreeBSD would run on a BBAI in >>>> the future, let=C2=B4s say in 2 to 3 years? >>>>=20 >>>> Perhaps I could help porting FreeBSD to a BBAI. What would be the >>>> general steps? >>>>=20 >>>>=20 >>>> Many thanks in advance for any suggestions, advices and >>>> clarifications. >>>>=20 >>>> Best regards >>>>=20 >>>> Rolf >>>=20 >>> BTW, if you need drivers for any new i2c devices just let me know >>> and >>> I'll see what I can do. >>=20 >> I am pretty comfortable with register level programming, and so far I >> came away with ioctl() calls for what I needed. So perhaps I won=C2=B4t= >> need exactly a driver for new I=C2=B2C devices. However, I am far = away >> from being a perfect I=C2=B2C expert, specially when it comes to = timing >> and the best sequence of addressing different devices on the bus. >> Perhaps, I may ask some questions when I run into problems. >>=20 >>> Also, in my experience you can often get away with running an i2c >>> bus >>> faster than 400khz if you need more bandwidth. I've never seen any >>> modern chip fail to work at 800khz, and most seem to work fine up >>> to >>> about 1mhz; above that they become pretty unreliable. >>=20 >> Does this =E2=80=9Eover clocking=E2=80=9C work for the ARM boards as = well? I just set >> the clock-frequency in the dts-overlay which activates I2C1 of the >> BBB from 400000 to 800000. The bus seems to work as usual, however, I >> did not yet come to check its speed. How again would I do that? >> Probably there are many more questions to come :-) >>=20 >> Best regards >>=20 >> Rolf >=20 > I suspect it works on some boards and maybe won't work on others. = Some > SOCs have very flexible clock settings in their i2c controllers, a few > just allow choosing between fixed low and high speeds. >=20 > For experimenting, there is a sysctl dev.iicbus.#.frequency that you > can change on the fly (it will override any value from the dts). The > value is the frequency in hz. >=20 > -- Ian Thank you very much for your response. I checked the sysctl setting, and = the system accepts the values. The bus works at 800000, however, I can = set it as high as 10000000 (10 MHz) and it is still working. Perhaps, = there is some sort of internal validation before the frequency value is = actually applied to the HW. In the moment this is more a matter of = curiosity than an actual need. Once we equipped the bus with all I=C2=B2C = devices, we will perhaps run into some timing issues, and then I = probably want to revisit changing the clock frequency again. Best reagrds Rolf=