From owner-freebsd-arch@FreeBSD.ORG Mon Apr 20 15:18:23 2015 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A5BDF44E for ; Mon, 20 Apr 2015 15:18:23 +0000 (UTC) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7D57D7C for ; Mon, 20 Apr 2015 15:18:23 +0000 (UTC) Received: from ralph.baldwin.cx (pool-173-54-116-245.nwrknj.fios.verizon.net [173.54.116.245]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 0A299B91F; Mon, 20 Apr 2015 11:18:22 -0400 (EDT) From: John Baldwin To: Yue Chen Cc: freebsd-arch@freebsd.org Subject: Re: Situations about PC values in kernel data segments Date: Mon, 20 Apr 2015 11:07:05 -0400 Message-ID: <2404384.sKCn9g0TDD@ralph.baldwin.cx> User-Agent: KMail/4.14.2 (FreeBSD/10.1-STABLE; KDE/4.14.2; amd64; ; ) In-Reply-To: References: <6048769.xVxqkDkTGK@ralph.baldwin.cx> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Mon, 20 Apr 2015 11:18:22 -0400 (EDT) X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Apr 2015 15:18:23 -0000 On Friday, April 17, 2015 04:19:54 PM Yue Chen wrote: > I mean, the PC values in non-.text segments like .data, .rodata, stack, > heap, etc. Usually this is for comparison purposes. E.g., compare the > faulting PC against some range already stored in a table/handler. > > > When pcb_onfault is used it is set to point to code in a .text segment, > not anywhere else. > > The pointer value stored in non-.text segments is a PC value (instruction > address in .text), like 0xffffffff12345678, and may not be a function entry > point address, right? I think I do not follow your question. Are you asking if you can figure out if a given PC value used as the value of $rip for an arbitrary instruction is valid, or are you trying to enumerate all the words in memory that hold a pointer to a .text value (like pcb_onfault)? I assumed the former. AFAIK, the kernel is not going to execute any code from .data, .rodata, or the stack. For things like pcb_onfault, the value stored is in .text, like this: ENTRY(copyout) PUSH_FRAME_POINTER movq PCPU(CURPCB),%rax movq $copyout_fault,PCB_ONFAULT(%rax) testq %rdx,%rdx /* anything to do? */ jz done_copyout ... done_copyout: xorl %eax,%eax movq PCPU(CURPCB),%rdx movq %rax,PCB_ONFAULT(%rdx) POP_FRAME_POINTER ret ALIGN_TEXT copyout_fault: movq PCPU(CURPCB),%rdx movq $0,PCB_ONFAULT(%rdx) movq $EFAULT,%rax POP_FRAME_POINTER ret END(copyout) Here 'copyout_fault' is in .text, not in a different section. > > > On Fri, Apr 17, 2015 at 9:22 AM, John Baldwin wrote: > > > On Saturday, April 11, 2015 05:18:28 AM Yue Chen wrote: > > > Dear all, > > > > > > We are working on a project about OS security. > > > We wonder in which situations the program counter (PC) value (e.g., the > > > value in %RIP on x86_64, i.e, instruction address) could be in kernel > > > (module) data segments (including stack, heap, etc.). > > > > > > Here we mainly care about the address/value that are NOT function entry > > > points since there exist a number of function pointers. Also, we only > > > consider the normal cases because one can write arbitrary values into a > > > variable/pointer. And we mainly consider i386, AMD64 and ARM. > > > > > > Here are some situations I can think about: > > > function/interrupt/exception/syscall return address on stack; switch/case > > > jump table target; page fault handler (pcb_onfault on *BSD); restartable > > > atomic sequences (RAS) registry; thread/process context structure like > > Task > > > state segment (TSS), process control block (PCB) and thread control block > > > (TCB); situations for debugging purposes (e.g., like those in ``segment > > not > > > present'' exception handler). > > > > > > Additionally, does any of these addresses have offset formats or special > > > encodings? For example, on x86_64, we may use 32-bit RIP-relative > > > (addressing) offset to represent a 64-bit full address. In glibc's > > > setjmp/longjmp jmp_buf, they use a special encoding (PTR_MANGLE) for > > saved > > > register values. > > > > For i386 and amd64, I think all of the code that is executed does live in a > > .text segment. When pcb_onfault is used it is set to point to code in a > > .text > > segment, not anywhere else. Similarly, fault and exception handlers as > > well > > as the stub for new threads/processes after fork/thread_create is in .text > > as well. There are multiple text segments present when modules are loaded > > of course, but you should be able to enumerate all of those in the linker. > > > > -- > > John Baldwin > > -- John Baldwin