Date: Mon, 10 Jan 2022 17:33:32 -0700 From: Warner Losh <imp@bsdimp.com> To: Olivier Houchard <cognet@ci0.org> Cc: John Baldwin <jhb@freebsd.org>, Warner Losh <imp@freebsd.org>, src-committers <src-committers@freebsd.org>, "<dev-commits-src-all@freebsd.org>" <dev-commits-src-all@freebsd.org>, dev-commits-src-main@freebsd.org Subject: Re: git: d6c0538dae8d - main - ddb: Remove SOFTWARE_SSTEP support Message-ID: <CANCZdfrYukYT6Pbmo-3R0g_PHSLZnxOd2HPfPz4AhqrUyudAWQ@mail.gmail.com> In-Reply-To: <YdzAxFygdFHz4ZSY@ci0.org> References: <202201071627.207GRsGX062055@gitrepo.freebsd.org> <45275428-75e2-aaae-bed3-e5e84b39e17c@FreeBSD.org> <CANCZdfq0UCZvdcsuaWx3KXqrKBBYoxDHqc=_P3U7L4QpCyh=rw@mail.gmail.com> <YdynB3Omo4RK16Fx@ci0.org> <61fa2498-3516-0f1b-fb24-270d38f0472f@FreeBSD.org> <YdzAxFygdFHz4ZSY@ci0.org>
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--00000000000000fe8305d5439b7c Content-Type: text/plain; charset="UTF-8" On Mon, Jan 10, 2022 at 4:27 PM Olivier Houchard <cognet@ci0.org> wrote: > On Mon, Jan 10, 2022 at 02:50:40PM -0800, John Baldwin wrote: > > On 1/10/22 1:37 PM, Olivier Houchard wrote: > > > On Mon, Jan 10, 2022 at 02:14:54PM -0700, Warner Losh wrote: > > >> On Mon, Jan 10, 2022 at 12:48 PM John Baldwin <jhb@freebsd.org> > wrote: > > >> > > >>> On 1/7/22 8:27 AM, Warner Losh wrote: > > >>>> The branch main has been updated by imp: > > >>>> > > >>>> URL: > > >>> > https://cgit.FreeBSD.org/src/commit/?id=d6c0538dae8d138219dfd051994a44c50e741212 > > >>>> > > >>>> commit d6c0538dae8d138219dfd051994a44c50e741212 > > >>>> Author: Warner Losh <imp@FreeBSD.org> > > >>>> AuthorDate: 2022-01-07 16:25:33 +0000 > > >>>> Commit: Warner Losh <imp@FreeBSD.org> > > >>>> CommitDate: 2022-01-07 16:25:33 +0000 > > >>>> > > >>>> ddb: Remove SOFTWARE_SSTEP support > > >>>> > > >>>> It was needed for mips only, and only kinda sorta worked for > mips. > > >>> It > > >>>> can be brought back if we grow another architecture that need > it. > > >>>> > > >>>> Sponsored by: Netflix > > >>> > > >>> RISC-V would need it in theory (no hardware single step), but no one > has > > >>> felt the > > >>> need to implement the backend support for it. I think 32-bit arm > doesn't > > >>> support > > >>> hardware single step either (but again, no one has bothered to add > the > > >>> backend > > >>> support). > > >>> > > >> > > >> Generally, I agree with these thoughts. I went ahead with the removal > > >> because I > > >> knew it would be easy to bring back, even years from now should > someone[tm] > > >> have an implementation for those platforms (though I thought 32-bit > arm did > > >> have > > >> single step in hardware). > > >> > > >> Should I put it back? Or should we wait until someone shows up with > support > > >> for > > >> a supported platform? > > >> > > > > > > It was used for arm, but only older arm, ie v4/v5, pretty sure newer > > > cores do have hardware breakpoints. > > > > They have hardware breakpoints/watchpoints, not sure if they have single > step. > > > > In GDB 32-bit arm only supports software single step, even on Linux. > > > > Seems true, the newer code just seems to use hardware breakpoints, but > the logic is the same as what was done with SOFTWARE_SSTEP. > If there's a backend for armv7 that shows up, we can put this back :) I was confused between hardware breakpoints and single step. Warner --00000000000000fe8305d5439b7c Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable <div dir=3D"ltr"><div dir=3D"ltr"><br></div><br><div class=3D"gmail_quote">= <div dir=3D"ltr" class=3D"gmail_attr">On Mon, Jan 10, 2022 at 4:27 PM Olivi= er Houchard <<a href=3D"mailto:cognet@ci0.org">cognet@ci0.org</a>> wr= ote:<br></div><blockquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px= 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Mon, Jan= 10, 2022 at 02:50:40PM -0800, John Baldwin wrote:<br> > On 1/10/22 1:37 PM, Olivier Houchard wrote:<br> > > On Mon, Jan 10, 2022 at 02:14:54PM -0700, Warner Losh wrote:<br> > >> On Mon, Jan 10, 2022 at 12:48 PM John Baldwin <<a href=3D"= mailto:jhb@freebsd.org" target=3D"_blank">jhb@freebsd.org</a>> wrote:<br= > > >><br> > >>> On 1/7/22 8:27 AM, Warner Losh wrote:<br> > >>>> The branch main has been updated by imp:<br> > >>>><br> > >>>> URL:<br> > >>> <a href=3D"https://cgit.FreeBSD.org/src/commit/?id=3Dd6c0= 538dae8d138219dfd051994a44c50e741212" rel=3D"noreferrer" target=3D"_blank">= https://cgit.FreeBSD.org/src/commit/?id=3Dd6c0538dae8d138219dfd051994a44c50= e741212</a><br> > >>>><br> > >>>> commit d6c0538dae8d138219dfd051994a44c50e741212<br> > >>>> Author:=C2=A0 =C2=A0 =C2=A0Warner Losh <imp@FreeBS= D.org><br> > >>>> AuthorDate: 2022-01-07 16:25:33 +0000<br> > >>>> Commit:=C2=A0 =C2=A0 =C2=A0Warner Losh <imp@FreeBS= D.org><br> > >>>> CommitDate: 2022-01-07 16:25:33 +0000<br> > >>>><br> > >>>>=C2=A0 =C2=A0 =C2=A0 =C2=A0ddb: Remove SOFTWARE_SSTEP = support<br> > >>>><br> > >>>>=C2=A0 =C2=A0 =C2=A0 =C2=A0It was needed for mips only= , and only kinda sorta worked for mips.<br> > >>> It<br> > >>>>=C2=A0 =C2=A0 =C2=A0 =C2=A0can be brought back if we g= row another architecture that need it.<br> > >>>><br> > >>>>=C2=A0 =C2=A0 =C2=A0 =C2=A0Sponsored by:=C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0Netflix<br> > >>><br> > >>> RISC-V would need it in theory (no hardware single step),= but no one has<br> > >>> felt the<br> > >>> need to implement the backend support for it.=C2=A0 I thi= nk 32-bit arm doesn't<br> > >>> support<br> > >>> hardware single step either (but again, no one has bother= ed to add the<br> > >>> backend<br> > >>> support).<br> > >>><br> > >><br> > >> Generally, I agree with these thoughts. I went ahead with the= removal<br> > >> because I<br> > >> knew it would be easy to bring back, even years from now shou= ld someone[tm]<br> > >> have an implementation for those platforms (though I thought = 32-bit arm did<br> > >> have<br> > >> single step in hardware).<br> > >><br> > >> Should I put it back? Or should we wait until someone shows u= p with support<br> > >> for<br> > >> a supported platform?<br> > >><br> > > <br> > > It was used for arm, but only older arm, ie v4/v5, pretty sure ne= wer<br> > > cores do have hardware breakpoints.<br> > <br> > They have hardware breakpoints/watchpoints, not sure if they have sing= le step.<br> > <br> > In GDB 32-bit arm only supports software single step, even on Linux.<b= r> > <br> <br> Seems true, the newer code just seems to use hardware breakpoints, but<br> the logic is the same as what was done with SOFTWARE_SSTEP.<br></blockquote= ><div><br></div><div>If there's a backend for armv7 that shows up, we c= an put this back :)</div><div><br></div><div>I was confused between hardwar= e breakpoints and single step.</div><div><br></div><div>Warner</div></div><= /div> --00000000000000fe8305d5439b7c--
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