From owner-svn-src-head@FreeBSD.ORG Mon Sep 17 07:14:08 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 17C88106564A; Mon, 17 Sep 2012 07:14:08 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id ECF178FC08; Mon, 17 Sep 2012 07:14:07 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q8H7E7Fd067508; Mon, 17 Sep 2012 07:14:07 GMT (envelope-from andrew@svn.freebsd.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q8H7E7SQ067505; Mon, 17 Sep 2012 07:14:07 GMT (envelope-from andrew@svn.freebsd.org) Message-Id: <201209170714.q8H7E7SQ067505@svn.freebsd.org> From: Andrew Turner Date: Mon, 17 Sep 2012 07:14:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r240594 - head/sys/boot/fdt/dts X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 17 Sep 2012 07:14:08 -0000 Author: andrew Date: Mon Sep 17 07:14:07 2012 New Revision: 240594 URL: http://svn.freebsd.org/changeset/base/240594 Log: Add the Tegra2 DTS files. Now our dtc supports including other files use this support to pull out the SoC specific parts of the dts file. Added: head/sys/boot/fdt/dts/tegra20-paz00.dts (contents, props changed) head/sys/boot/fdt/dts/tegra20.dtsi (contents, props changed) Added: head/sys/boot/fdt/dts/tegra20-paz00.dts ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/boot/fdt/dts/tegra20-paz00.dts Mon Sep 17 07:14:07 2012 (r240594) @@ -0,0 +1,58 @@ +/*- + * Copyright (c) 2011 The FreeBSD Foundation + * Copyright (c) 2012 Andrew Turner + * All rights reserved. + * + * Developed by Damjan Marion + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +/dts-v1/; + +/include/ "tegra20.dtsi" + +/ { + model = "Toshiba AC100 / Dynabook AZ"; + + aliases { + serial0 = &serial0; + soc = &SOC; + }; + + memory { + device_type = "memory"; + reg = < 0x00000000 0x20000000 >; /* 512MB RAM at 0x0 */ + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; + + SOC: tegra20@0 { + serial0: serial@70006000 { + }; + }; +}; + Added: head/sys/boot/fdt/dts/tegra20.dtsi ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/boot/fdt/dts/tegra20.dtsi Mon Sep 17 07:14:07 2012 (r240594) @@ -0,0 +1,74 @@ +/*- + * Copyright (c) 2011 The FreeBSD Foundation + * Copyright (c) 2012 Andrew Turner + * All rights reserved. + * + * Developed by Damjan Marion + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/ { + compatible = "compal,paz00", "nvidia,tegra20"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&GIC>; + + SOC: tegra20@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + bus-frequency = <0>; + + GIC: interrupt-controller@50041000 { + compatible = "arm,gic"; + reg = < 0x50041000 0x1000 >, /* Distributor Registers */ + < 0x50040100 0x0100 >; /* CPU Interface Registers */ + interrupt-controller; + #interrupt-cells = <1>; + }; + + mp_tmr@50040200 { + compatible = "arm,mpcore-timers"; + clock-frequency = < 50040200 >; + #address-cells = <1>; + #size-cells = <0>; + reg = < 0x50040200 0x100 >, /* Global Timer Registers */ + < 0x50040600 0x100 >; /* Private Timer Registers */ + interrupts = < 27 29 >; + interrupt-parent = <&GIC>; + }; + + serial@70006000 { + compatible = "ns16550"; + reg = <0x70006000 0x40>; + reg-shift = <2>; + interrupts = < 68 >; + interrupt-parent = <&GIC>; + clock-frequency = < 215654400 >; + }; + }; +}; +