Date: Sun, 2 Jun 2024 22:15:06 +0100 From: Jessica Clarke <jrtc27@freebsd.org> To: Colin Percival <cperciva@tarsnap.com> Cc: "src-committers@freebsd.org" <src-committers@FreeBSD.org>, "dev-commits-src-all@freebsd.org" <dev-commits-src-all@FreeBSD.org>, "dev-commits-src-main@freebsd.org" <dev-commits-src-main@FreeBSD.org> Subject: Re: git: 28aaa58fa64e - main - fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence Message-ID: <6489FC3C-5B0E-4B07-A6EF-92EA3B353423@freebsd.org> In-Reply-To: <0100018fdac22280-97d0bb7c-c35e-4017-aeb8-9c9f2413094c-000000@email.amazonses.com> References: <202406022043.452Khmjb050139@gitrepo.freebsd.org> <0100018fdac22280-97d0bb7c-c35e-4017-aeb8-9c9f2413094c-000000@email.amazonses.com>
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On 2 Jun 2024, at 22:01, Colin Percival <cperciva@tarsnap.com> wrote: >=20 > On 6/2/24 13:43, Jessica Clarke wrote: >> fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset = sequence >> DELAY takes microseconds not milliseconds, so 100 was too = low. Moreover, >> when enabling hw.pci.clear_pcib, PCI emeration would still stop = at one >> of the first bridges, but by asserting PERST for the rest of the = reset >> sequence that appears to be reliably addressed. >=20 > Does this need to be a DELAY as opposed to something asynchronous? We = try to > avoid lengthy DELAYs in the boot process. It=E2=80=99s in the middle of device_attach, so you=E2=80=99d need to = break it up into two stages. I don=E2=80=99t know if we have a good way of doing that for delays; I=E2=80=99ve seen other glue code drivers do things like this, = but there may well be a better way, and if so I=E2=80=99m all ears. Though = given you won=E2=80=99t have working PCI (so no USB nor NVMe) until this is = done there=E2=80=99s probably not much more you can do during boot whilst you = wait, so it may not be worth pursuing. Also, given the performance of the SoC in question, 100ms isn=E2=80=99t something you=E2=80=99d be close to = noticing... Jess
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