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Date:      Fri, 23 Sep 2016 17:24:07 +0000 (UTC)
From:      Navdeep Parhar <np@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r306273 - head/sys/dev/cxgbe
Message-ID:  <201609231724.u8NHO72b060453@repo.freebsd.org>
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Author: np
Date: Fri Sep 23 17:24:06 2016
New Revision: 306273
URL: https://svnweb.freebsd.org/changeset/base/306273

Log:
  cxgbe(4): Fix netmap with T6, which doesn't encapsulate SGE_EGR_UPDATE
  message inside a FW_MSG.  The base NIC already deals with updates in
  either form.
  
  Sponsored by:	Chelsio Communications

Modified:
  head/sys/dev/cxgbe/t4_netmap.c

Modified: head/sys/dev/cxgbe/t4_netmap.c
==============================================================================
--- head/sys/dev/cxgbe/t4_netmap.c	Fri Sep 23 16:47:12 2016	(r306272)
+++ head/sys/dev/cxgbe/t4_netmap.c	Fri Sep 23 17:24:06 2016	(r306273)
@@ -883,19 +883,23 @@ cxgbe_nm_detach(struct vi_info *vi)
 	netmap_detach(vi->ifp);
 }
 
+static inline const void *
+unwrap_nm_fw6_msg(const struct cpl_fw6_msg *cpl)
+{
+
+	MPASS(cpl->type == FW_TYPE_RSSCPL || cpl->type == FW6_TYPE_RSSCPL);
+
+	/* data[0] is RSS header */
+	return (&cpl->data[1]);
+}
+
 static void
-handle_nm_fw6_msg(struct adapter *sc, struct ifnet *ifp,
-    const struct cpl_fw6_msg *cpl)
+handle_nm_sge_egr_update(struct adapter *sc, struct ifnet *ifp,
+    const struct cpl_sge_egr_update *egr)
 {
-	const struct cpl_sge_egr_update *egr;
 	uint32_t oq;
 	struct sge_nm_txq *nm_txq;
 
-	if (cpl->type != FW_TYPE_RSSCPL && cpl->type != FW6_TYPE_RSSCPL)
-		panic("%s: FW_TYPE 0x%x on nm_rxq.", __func__, cpl->type);
-
-	/* data[0] is RSS header */
-	egr = (const void *)&cpl->data[1];
 	oq = be32toh(egr->opcode_qid);
 	MPASS(G_CPL_OPCODE(oq) == CPL_SGE_EGR_UPDATE);
 	nm_txq = (void *)sc->sge.eqmap[G_EGR_QID(oq) - sc->sge.eq_start];
@@ -914,6 +918,7 @@ t4_nm_intr(void *arg)
 	struct netmap_kring *kring = &na->rx_rings[nm_rxq->nid];
 	struct netmap_ring *ring = kring->ring;
 	struct iq_desc *d = &nm_rxq->iq_desc[nm_rxq->iq_cidx];
+	const void *cpl;
 	uint32_t lq;
 	u_int n = 0, work = 0;
 	uint8_t opcode;
@@ -926,6 +931,7 @@ t4_nm_intr(void *arg)
 
 		lq = be32toh(d->rsp.pldbuflen_qid);
 		opcode = d->rss.opcode;
+		cpl = &d->cpl[0];
 
 		switch (G_RSPD_TYPE(d->rsp.u.type_gen)) {
 		case X_RSPD_TYPE_FLBUF:
@@ -942,8 +948,10 @@ t4_nm_intr(void *arg)
 			switch (opcode) {
 			case CPL_FW4_MSG:
 			case CPL_FW6_MSG:
-				handle_nm_fw6_msg(sc, ifp,
-				    (const void *)&d->cpl[0]);
+				cpl = unwrap_nm_fw6_msg(cpl);
+				/* fall through */
+			case CPL_SGE_EGR_UPDATE:
+				handle_nm_sge_egr_update(sc, ifp, cpl);
 				break;
 			case CPL_RX_PKT:
 				ring->slot[fl_cidx].len = G_RSPD_LEN(lq) -

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