Date: Fri, 4 May 2012 02:26:15 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r234992 - head/sys/mips/atheros Message-ID: <201205040226.q442QFfp081451@svn.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: adrian Date: Fri May 4 02:26:15 2012 New Revision: 234992 URL: http://svn.freebsd.org/changeset/base/234992 Log: Disable setting the MII port speed. This seems to break at least my test board here (AR71xx + AR8316 switch PHY). Since I do have a whole sleuth of "normal" PHY boards (with an AR71xx on a normal PHY port), I'll do some further testing with those to determine whether this is a general issue, or whether it's limited to the behaviour of the "fake" dedicated PHY port mode on these atheros switches. Modified: head/sys/mips/atheros/if_arge.c Modified: head/sys/mips/atheros/if_arge.c ============================================================================== --- head/sys/mips/atheros/if_arge.c Fri May 4 01:35:13 2012 (r234991) +++ head/sys/mips/atheros/if_arge.c Fri May 4 02:26:15 2012 (r234992) @@ -932,7 +932,19 @@ arge_set_pll(struct arge_softc *sc, int ar71xx_device_set_pll_ge(sc->arge_mac_unit, if_speed, pll); /* set MII registers */ + /* + * This was introduced to match what the Linux ag71xx ethernet + * driver does. For the AR71xx case, it does set the port + * MII speed. However, if this is done, non-gigabit speeds + * are not at all reliable when speaking via RGMII through + * 'bridge' PHY port that's pretending to be a local PHY. + * + * Until that gets root caused, and until an AR71xx + normal + * PHY board is tested, leave this disabled. + */ +#if 0 ar71xx_device_set_mii_speed(sc->arge_mac_unit, if_speed); +#endif }
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201205040226.q442QFfp081451>