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Wed, 27 Feb 2019 17:29:39 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x1RHTcfC008991; Wed, 27 Feb 2019 17:29:38 GMT (envelope-from manu@FreeBSD.org) Received: (from manu@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x1RHTc0u008990; Wed, 27 Feb 2019 17:29:38 GMT (envelope-from manu@FreeBSD.org) Message-Id: <201902271729.x1RHTc0u008990@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: manu set sender to manu@FreeBSD.org using -f From: Emmanuel Vadot Date: Wed, 27 Feb 2019 17:29:38 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r344626 - head/sys/arm64/rockchip/clk X-SVN-Group: head X-SVN-Commit-Author: manu X-SVN-Commit-Paths: head/sys/arm64/rockchip/clk X-SVN-Commit-Revision: 344626 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 3CA1387805 X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.95 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.999,0]; NEURAL_HAM_LONG(-1.00)[-0.999,0]; NEURAL_HAM_SHORT(-0.95)[-0.947,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US] X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Feb 2019 17:29:39 -0000 Author: manu Date: Wed Feb 27 17:29:38 2019 New Revision: 344626 URL: https://svnweb.freebsd.org/changeset/base/344626 Log: arm64: rockchip: rk3399_clk: Add sd clock definitions MFC after: 1 week Modified: head/sys/arm64/rockchip/clk/rk3399_cru.c Modified: head/sys/arm64/rockchip/clk/rk3399_cru.c ============================================================================== --- head/sys/arm64/rockchip/clk/rk3399_cru.c Wed Feb 27 17:00:27 2019 (r344625) +++ head/sys/arm64/rockchip/clk/rk3399_cru.c Wed Feb 27 17:29:38 2019 (r344626) @@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$"); #define PCLK_I2C5 344 #define PCLK_I2C6 345 #define PCLK_I2C7 346 +#define HCLK_SDMMC 462 static struct rk_cru_gate rk3399_gates[] = { /* CRU_CLKGATE_CON0 */ @@ -99,6 +100,9 @@ static struct rk_cru_gate rk3399_gates[] = { CRU_GATE(PCLK_GPIO2, "pclk_gpio2", "pclk_alive", 0x37c, 3) CRU_GATE(PCLK_GPIO3, "pclk_gpio3", "pclk_alive", 0x37c, 4) CRU_GATE(PCLK_GPIO4, "pclk_gpio4", "pclk_alive", 0x37c, 5) + + /* CRU_CLKGATE_CON33 */ + CRU_GATE(HCLK_SDMMC, "hclk_sdmmc", "hclk_sd", 0x384, 8) }; @@ -1385,6 +1389,60 @@ static struct rk_clk_armclk_def armclk_b = { .nrates = nitems(rk3399_armclkb_rates), }; +/* + * sdmmc + */ + +#define HCLK_SD 461 + +static const char *hclk_sd_parents[] = {"cpll", "gpll"}; + +static struct rk_clk_composite_def hclk_sd = { + .clkdef = { + .id = HCLK_SD, + .name = "hclk_sd", + .parent_names = hclk_sd_parents, + .parent_cnt = nitems(hclk_sd_parents), + }, + + .muxdiv_offset = 0x134, + .mux_shift = 15, + .mux_width = 1, + + .div_shift = 8, + .div_width = 5, + + .gate_offset = 0x330, + .gate_shift = 13, + + .flags = RK_CLK_COMPOSITE_HAVE_MUX | RK_CLK_COMPOSITE_HAVE_GATE, +}; + +#define SCLK_SDMMC 76 + +static const char *sclk_sdmmc_parents[] = {"cpll", "gpll", "npll", "ppll"}; + +static struct rk_clk_composite_def sclk_sdmmc = { + .clkdef = { + .id = SCLK_SDMMC, + .name = "sclk_sdmmc", + .parent_names = sclk_sdmmc_parents, + .parent_cnt = nitems(sclk_sdmmc_parents), + }, + + .muxdiv_offset = 0x140, + .mux_shift = 8, + .mux_width = 3, + + .div_shift = 0, + .div_width = 7, + + .gate_offset = 0x318, + .gate_shift = 1, + + .flags = RK_CLK_COMPOSITE_HAVE_MUX | RK_CLK_COMPOSITE_HAVE_GATE, +}; + static struct rk_clk rk3399_clks[] = { { .type = RK3399_CLK_PLL, @@ -1483,6 +1541,15 @@ static struct rk_clk rk3399_clks[] = { { .type = RK_CLK_ARMCLK, .clk.armclk = &armclk_b, + }, + + { + .type = RK_CLK_COMPOSITE, + .clk.composite = &hclk_sd, + }, + { + .type = RK_CLK_COMPOSITE, + .clk.composite = &sclk_sdmmc, }, };