From owner-freebsd-hardware Sat Jun 22 14:09:23 1996 Return-Path: owner-hardware Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id OAA09108 for hardware-outgoing; Sat, 22 Jun 1996 14:09:23 -0700 (PDT) Received: from portal.spi.net ([199.238.225.153]) by freefall.freebsd.org (8.7.5/8.7.3) with SMTP id OAA09097 for ; Sat, 22 Jun 1996 14:09:20 -0700 (PDT) Received: from MindBender.HeadCandy.com (root@MindBender.HeadCandy.com [199.238.225.168]) by portal.spi.net (8.6.12/8.6.9) with ESMTP id OAA03488; Sat, 22 Jun 1996 14:09:13 -0700 Received: from localhost.HeadCandy.com (michaelv@localhost.HeadCandy.com [127.0.0.1]) by MindBender.HeadCandy.com (8.7.5/8.6.9) with SMTP id OAA11215; Sat, 22 Jun 1996 14:09:12 -0700 (PDT) Message-Id: <199606222109.OAA11215@MindBender.HeadCandy.com> X-Authentication-Warning: MindBender.HeadCandy.com: Host michaelv@localhost.HeadCandy.com [127.0.0.1] didn't use HELO protocol To: nash@mcs.com cc: freebsd-hardware@freebsd.org Subject: Re: Mixing SIMMs of different speeds In-reply-to: Your message of Sat, 22 Jun 96 15:41:26 -0500. <199606222041.PAA13207@zen.nash.org> Date: Sat, 22 Jun 1996 14:09:11 -0700 From: "Michael L. VanLoon -- HeadCandy.com" Sender: owner-hardware@freebsd.org X-Loop: FreeBSD.org Precedence: bulk >I'm wondering if I can mix 60 and 70ns SIMMs. Everyone says don't, >but they don't say why. I can understand not mixing SIMMs that will >be accessed simultaneously (like banks 1 and 2), but why shouldn't it >work when they are separated? My motherboard's manual indicates 70ns >or faster will work, so why wouldn't a mixture? Probably because the people who designed your motherboard designed its timing parameters with the assumption that all your memory would display consistent behavior. Another thing is that some motherboards will do interleaved access if you have matching size SIMMs in all the slots. This is where it alternates between accessing bank 1 and bank 2 on even/odd memory accesses. This speeds things up because it only has to initialize the address on the first access of a burst, and can then burst in consecutive blocks of memory with little setup time. If your SIMMs have different timing characteristics, you will definitely have to find a way to let your motherboard know to use only the slowest access speed, or don't try it at all. FWIW, my (ASUS Pentium) motherboard manual says to use only 60ns or faster if you run the memory bus at ~66MHz. >So I add 2 70ns SIMMs to the motherboard that had 60s in banks 1 and >2, and (not too surprisingly) strange things happened. >I removed the 60s and ran with just the 70s, it seems to be working >great. >Now I'm starting to think, what if I ran with 70s in banks 1 & 2 and >60s in banks 3 & 4? Since the motherboard runs with 70s ok, but the >60/70 mixture didn't work the first time, it must be able to determine >the access speed. Is the motherboard using bank 1 to determine what >speed it should access memory with? (This is a Tyan S1462 MB.) If it were going to work at all, that would be my suggestion: put the slower memory first, so if it does some sort of test to see how fast your memory is, it might use the slower memory for the timings. Note that this is highly speculative and implementation specific. Only the people who designed your motherboard can tell you for sure. ----------------------------------------------------------------------------- Michael L. VanLoon michaelv@HeadCandy.com --< Free your mind and your machine -- NetBSD free un*x >-- NetBSD working ports: 386+PC, Mac 68k, Amiga, Atari 68k, HP300, Sun3, Sun4/4c/4m, DEC MIPS, DEC Alpha, PC532, VAX, MVME68k, arm32... NetBSD ports in progress: PICA, others... Roll your own Internet access -- Seattle People's Internet cooperative. If you're in the Seattle area, ask me how. -----------------------------------------------------------------------------