From owner-freebsd-current@freebsd.org Wed Apr 18 19:13:15 2018 Return-Path: Delivered-To: freebsd-current@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 65CCBFA3915; Wed, 18 Apr 2018 19:13:15 +0000 (UTC) (envelope-from satan@ukr.net) Received: from hell.ukr.net (hell.ukr.net [212.42.67.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id F208D814E1; Wed, 18 Apr 2018 19:13:14 +0000 (UTC) (envelope-from satan@ukr.net) Received: from satan by hell.ukr.net with local ID 1f8sVz-000Arj-Pe ; Wed, 18 Apr 2018 22:13:11 +0300 Date: Wed, 18 Apr 2018 22:13:11 +0300 From: Vitalij Satanivskij To: John Baldwin Cc: Vitalij Satanivskij , freebsd-current@freebsd.org, cem@freebsd.org, Stephen Hurd , Matthew Macy , "freebsd-hackers@freebsd.org" , Stephen Hurd Subject: Re: Current panic on boot on H11DSI motherboard with epyc cpu (nexus_add_irq: failed) Message-ID: <20180418191311.GA74540@hell.ukr.net> References: <20180416102710.GA90028@hell.ukr.net> <3628282.XVdngBdGlp@ralph.baldwin.cx> <20180418105649.GA9989@hell.ukr.net> <1616582.sIejGazfcv@ralph.baldwin.cx> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1616582.sIejGazfcv@ralph.baldwin.cx> User-Agent: Mutt/1.9.5 (2018-04-13) X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 Apr 2018 19:13:15 -0000 JB> Ohhhh, this is a different issue. Sorry. As a hack, try changing JB> 'FIRST_MSI_INT' to 512 in sys/amd64/include/intr_machdep.h. The issue JB> is that some systems now include more than 256 interrupt pins on I/O JB> APICs, so IRQ 256 is already reserved for use by one of those JB> interrupt pins. The real fix is that I need to make FIRST_MSI_INT JB> dynamic instead of a constant and just define it as the first free IRQ JB> after the I/O APICs have probed. JB> Yep. That it. But just one note irq585: ccp14:721 @cpu0(domain0): 0 irq586: ccp14:723 @cpu0(domain0): 0 irq587: ccp15:725 @cpu0(domain0): 0 If I understand correctly number of irq's even more then 512, so better to change to real number in system ? Or this is another case ? Any way thank you for help. Now I can use system with msix and msi enabled.