From owner-svn-src-all@freebsd.org Fri Jun 12 18:41:13 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 7D069341DC3; Fri, 12 Jun 2020 18:41:13 +0000 (UTC) (envelope-from gallatin@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 49k8gs2dr8z3cdd; Fri, 12 Jun 2020 18:41:13 +0000 (UTC) (envelope-from gallatin@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 55FE7DEC1; Fri, 12 Jun 2020 18:41:13 +0000 (UTC) (envelope-from gallatin@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 05CIfDxE069348; Fri, 12 Jun 2020 18:41:13 GMT (envelope-from gallatin@FreeBSD.org) Received: (from gallatin@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 05CIfDNv069347; Fri, 12 Jun 2020 18:41:13 GMT (envelope-from gallatin@FreeBSD.org) Message-Id: <202006121841.05CIfDNv069347@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: gallatin set sender to gallatin@FreeBSD.org using -f From: Andrew Gallatin Date: Fri, 12 Jun 2020 18:41:13 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r362112 - head/sys/x86/x86 X-SVN-Group: head X-SVN-Commit-Author: gallatin X-SVN-Commit-Paths: head/sys/x86/x86 X-SVN-Commit-Revision: 362112 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Jun 2020 18:41:13 -0000 Author: gallatin Date: Fri Jun 12 18:41:12 2020 New Revision: 362112 URL: https://svnweb.freebsd.org/changeset/base/362112 Log: x86: Bump default msi/msix vector limit to 2048 Given that 64c/128t CPUs are currently available, and that many devices (nvme, many NICs) desire to map 1 MSI-X vector per core, or even 1 per-thread, it is becoming far easier to see MSI-X interrupt setup fail due to msi vector exhaustion, and devices fail to attach at boot on large system. This bump costs 12KB on amd64 (and 6KB on i386), which seems worth the trade off for a better out of the box experience on high end hardware. Reviewed by: jhb MFC after: 21 days Sponsored by: Netflix Modified: head/sys/x86/x86/msi.c Modified: head/sys/x86/x86/msi.c ============================================================================== --- head/sys/x86/x86/msi.c Fri Jun 12 18:13:32 2020 (r362111) +++ head/sys/x86/x86/msi.c Fri Jun 12 18:41:12 2020 (r362112) @@ -156,7 +156,7 @@ u_int first_msi_irq; SYSCTL_UINT(_machdep, OID_AUTO, first_msi_irq, CTLFLAG_RD, &first_msi_irq, 0, "Number of first IRQ reserved for MSI and MSI-X interrupts"); -u_int num_msi_irqs = 512; +u_int num_msi_irqs = 2048; SYSCTL_UINT(_machdep, OID_AUTO, num_msi_irqs, CTLFLAG_RDTUN, &num_msi_irqs, 0, "Number of IRQs reserved for MSI and MSI-X interrupts");