From owner-svn-src-all@FreeBSD.ORG Sun Jan 9 06:17:46 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B41291065670; Sun, 9 Jan 2011 06:17:46 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A42DA8FC17; Sun, 9 Jan 2011 06:17:46 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p096Hkef031842; Sun, 9 Jan 2011 06:17:46 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p096HkWd031840; Sun, 9 Jan 2011 06:17:46 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201101090617.p096HkWd031840@svn.freebsd.org> From: Adrian Chadd Date: Sun, 9 Jan 2011 06:17:46 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r217184 - head/sys/mips/atheros X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 09 Jan 2011 06:17:46 -0000 Author: adrian Date: Sun Jan 9 06:17:46 2011 New Revision: 217184 URL: http://svn.freebsd.org/changeset/base/217184 Log: Add missing ar91xx definition for the WMAC reset control. Modified: head/sys/mips/atheros/ar91xxreg.h Modified: head/sys/mips/atheros/ar91xxreg.h ============================================================================== --- head/sys/mips/atheros/ar91xxreg.h Sun Jan 9 06:12:33 2011 (r217183) +++ head/sys/mips/atheros/ar91xxreg.h Sun Jan 9 06:17:46 2011 (r217184) @@ -35,6 +35,7 @@ #define AR91XX_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c #define AR91XX_RST_RESET_MODULE_USBSUS_OVERRIDE (1 << 10) +#define AR91XX_RST_RESET_MODULE_AMBA2WMAC (1 << 22) /* PLL block */ #define AR91XX_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00