Date: Thu, 18 Jan 2018 18:19:31 +0000 (UTC) From: Ruslan Bukin <br@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r328133 - head/sys/dev/uart Message-ID: <201801181819.w0IIJVZ2025196@repo.freebsd.org>
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Author: br Date: Thu Jan 18 18:19:31 2018 New Revision: 328133 URL: https://svnweb.freebsd.org/changeset/base/328133 Log: UART Clock Selection Register holds a divider value for a supplied clock, not a final baud rate. The value for this register has to be calculated. Sponsored by: DARPA, AFRL Modified: head/sys/dev/uart/uart_dev_msm.h Modified: head/sys/dev/uart/uart_dev_msm.h ============================================================================== --- head/sys/dev/uart/uart_dev_msm.h Thu Jan 18 17:43:32 2018 (r328132) +++ head/sys/dev/uart/uart_dev_msm.h Thu Jan 18 18:19:31 2018 (r328133) @@ -80,22 +80,6 @@ enum UART_DM_BITS_PER_CHAR { /* UART Clock Selection Register, write only */ #define UART_DM_CSR 0x08 -#define UART_DM_CSR_115200 0xff -#define UART_DM_CSR_57600 0xee -#define UART_DM_CSR_38400 0xdd -#define UART_DM_CSR_28800 0xcc -#define UART_DM_CSR_19200 0xbb -#define UART_DM_CSR_14400 0xaa -#define UART_DM_CSR_9600 0x99 -#define UART_DM_CSR_7200 0x88 -#define UART_DM_CSR_4800 0x77 -#define UART_DM_CSR_3600 0x66 -#define UART_DM_CSR_2400 0x55 -#define UART_DM_CSR_1200 0x44 -#define UART_DM_CSR_600 0x33 -#define UART_DM_CSR_300 0x22 -#define UART_DM_CSR_150 0x11 -#define UART_DM_CSR_75 0x00 /* UART DM TX FIFO Registers - 4, write only */ #define UART_DM_TF(x) (0x70 + (4 * (x)))
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