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Date: Mon, 6 Feb 2006 02:10:05 GMT
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To: freebsd-i386@FreeBSD.org
From: HATANOU Tomomi <hatanou@infolab.ne.jp>
Cc: 
Subject: Re: i386/91328: [identcpu] [patch] L2/L3 cache of some IA32 CPUs
	not properly recognized.
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The following reply was made to PR i386/91328; it has been noted by GNATS.

From: HATANOU Tomomi <hatanou@infolab.ne.jp>
To: Alexander Leidinger <netchild@FreeBSD.org>
Cc: bug-followup@FreeBSD.org, hatanou@infolab.ne.jp
Subject: Re: i386/91328: [identcpu] [patch] L2/L3 cache of some IA32 CPUs not properly recognized.
Date: Mon, 06 Feb 2006 11:00:47 +0900

 Hi, thank you for your response.
 
 >the patch contains "3rd-level" entries. Is this a typo or by purpose?
 
 Not typos, but I haven't any specific purpose.
 
 I simply added lacked entries seeing intel AP-485
 document without much thought, because identcpu.c 1.154
 already had 3rd-level cache entry, such as 0x22 case.
 
 I'm not familiar with page colouring algorithm.
 If these L3 entries are harmful, please ignore them.
 
 cf.
 Intel Processor Identification and the CPUID Instruction
   Application Note 485
 http://developer.intel.com/design/xeon/applnots/241618.htm
 
 Oh, now I can see this document is updated on January
 2006.  More new descriptors are defined...
 --
 HATANOU Tomomi.