From owner-dev-commits-src-branches@freebsd.org Wed Apr 7 00:31:17 2021 Return-Path: Delivered-To: dev-commits-src-branches@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id A6F0D5C3815; Wed, 7 Apr 2021 00:31:17 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4FFQLF4HSpz3Dc4; Wed, 7 Apr 2021 00:31:17 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 85F941567D; Wed, 7 Apr 2021 00:31:17 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 1370VHeg019527; Wed, 7 Apr 2021 00:31:17 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 1370VHEu019526; Wed, 7 Apr 2021 00:31:17 GMT (envelope-from git) Date: Wed, 7 Apr 2021 00:31:17 GMT Message-Id: <202104070031.1370VHEu019526@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Alexander Motin Subject: git: e6e4f79a6c4d - stable/13 - Do not read timer extra time when MWAIT is used. MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mav X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: e6e4f79a6c4d3fcde9999e2a7897451de204f1c7 Auto-Submitted: auto-generated X-BeenThere: dev-commits-src-branches@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Commits to the stable branches of the FreeBSD src repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Apr 2021 00:31:17 -0000 The branch stable/13 has been updated by mav: URL: https://cgit.FreeBSD.org/src/commit/?id=e6e4f79a6c4d3fcde9999e2a7897451de204f1c7 commit e6e4f79a6c4d3fcde9999e2a7897451de204f1c7 Author: Alexander Motin AuthorDate: 2021-03-08 23:43:47 +0000 Commit: Alexander Motin CommitDate: 2021-04-07 00:31:10 +0000 Do not read timer extra time when MWAIT is used. When we enter C2+ state via memory read, it may take chipset some time to stop CPU. Extra register read covers that time. But MWAIT makes CPU stop immediately, so we don't need to waste time after wakeup with interrupts still disabled, increasing latency. On my system it reduces ping localhost latency, waking up all CPUs once a second, from 277us to 242us. MFC after: 1 month (cherry picked from commit 075e4807df3e6b0d9196d56e4dbc33765d57e1f8) --- sys/dev/acpica/acpi_cpu.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/sys/dev/acpica/acpi_cpu.c b/sys/dev/acpica/acpi_cpu.c index 436dd9ddaa93..56182ed743de 100644 --- a/sys/dev/acpica/acpi_cpu.c +++ b/sys/dev/acpica/acpi_cpu.c @@ -1220,18 +1220,19 @@ acpi_cpu_idle(sbintime_t sbt) start_time = 0; cputicks = cpu_ticks(); } - if (cx_next->do_mwait) + if (cx_next->do_mwait) { acpi_cpu_idle_mwait(cx_next->mwait_hint); - else + } else { CPU_GET_REG(cx_next->p_lvlx, 1); + /* + * Read the end time twice. Since it may take an arbitrary time + * to enter the idle state, the first read may be executed before + * the processor has stopped. Doing it again provides enough + * margin that we are certain to have a correct value. + */ + AcpiGetTimer(&end_time); + } - /* - * Read the end time twice. Since it may take an arbitrary time - * to enter the idle state, the first read may be executed before - * the processor has stopped. Doing it again provides enough - * margin that we are certain to have a correct value. - */ - AcpiGetTimer(&end_time); if (cx_next->type == ACPI_STATE_C3) { AcpiGetTimer(&end_time); AcpiGetTimerDuration(start_time, end_time, &end_time);