From owner-svn-src-all@freebsd.org Thu May 23 17:36:21 2019 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D8F7C15B0833; Thu, 23 May 2019 17:36:20 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 7992A765FE; Thu, 23 May 2019 17:36:20 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 55CE385E2; Thu, 23 May 2019 17:36:20 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x4NHaKUY037365; Thu, 23 May 2019 17:36:20 GMT (envelope-from manu@FreeBSD.org) Received: (from manu@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x4NHaJLK037362; Thu, 23 May 2019 17:36:19 GMT (envelope-from manu@FreeBSD.org) Message-Id: <201905231736.x4NHaJLK037362@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: manu set sender to manu@FreeBSD.org using -f From: Emmanuel Vadot Date: Thu, 23 May 2019 17:36:19 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r348181 - head/sys/arm/allwinner/clkng X-SVN-Group: head X-SVN-Commit-Author: manu X-SVN-Commit-Paths: head/sys/arm/allwinner/clkng X-SVN-Commit-Revision: 348181 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: 7992A765FE X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.97 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.995,0]; NEURAL_HAM_SHORT(-0.97)[-0.970,0]; NEURAL_HAM_LONG(-1.00)[-1.000,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US] X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 23 May 2019 17:36:21 -0000 Author: manu Date: Thu May 23 17:36:19 2019 New Revision: 348181 URL: https://svnweb.freebsd.org/changeset/base/348181 Log: arm: allwinner: clk: Use the new frac clock Some clocks used the NM type but this clock is for the ones with the formula "clk = clkin / n / m" and not "clk = clkin * n / m" Use the new frac clock for them. Modified: head/sys/arm/allwinner/clkng/ccu_a10.c head/sys/arm/allwinner/clkng/ccu_a31.c head/sys/arm/allwinner/clkng/ccu_a64.c head/sys/arm/allwinner/clkng/ccu_h3.c Modified: head/sys/arm/allwinner/clkng/ccu_a10.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_a10.c Thu May 23 17:35:40 2019 (r348180) +++ head/sys/arm/allwinner/clkng/ccu_a10.c Thu May 23 17:36:19 2019 (r348181) @@ -212,7 +212,7 @@ NKMP_CLK(pll_core_clk, 0, 0, /* lock */ AW_CLK_HAS_GATE); /* flags */ -NM_CLK_WITH_FRAC(pll_video0_clk, +FRAC_CLK(pll_video0_clk, CLK_PLL_VIDEO0, /* id */ "pll_video0", pll_parents, /* name, parents */ 0x10, /* offset */ @@ -231,7 +231,7 @@ FIXED_CLK(pll_video0_2x_clk, 1, /* div */ 0); /* flags */ -NM_CLK_WITH_FRAC(pll_video1_clk, +FRAC_CLK(pll_video1_clk, CLK_PLL_VIDEO1, /* id */ "pll_video1", pll_parents, /* name, parents */ 0x30, /* offset */ @@ -537,8 +537,8 @@ static struct aw_ccung_clk a10_ccu_clks[] = { { .type = AW_CLK_NM, .clk.nm = &ahb_clk}, { .type = AW_CLK_NM, .clk.nm = &apb0_clk}, { .type = AW_CLK_NM, .clk.nm = &apb1_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_video0_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_video1_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_video0_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_video1_clk}, { .type = AW_CLK_NM, .clk.nm = &nand_clk}, { .type = AW_CLK_NM, .clk.nm = &ms_clk}, { .type = AW_CLK_NM, .clk.nm = &mmc0_clk}, Modified: head/sys/arm/allwinner/clkng/ccu_a31.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_a31.c Thu May 23 17:35:40 2019 (r348180) +++ head/sys/arm/allwinner/clkng/ccu_a31.c Thu May 23 17:36:19 2019 (r348181) @@ -293,7 +293,7 @@ FIXED_CLK(pll_audio_8x_clk, 1, /* div */ 0); /* flags */ -NM_CLK_WITH_FRAC(pll_video0_clk, +FRAC_CLK(pll_video0_clk, CLK_PLL_VIDEO0, /* id */ "pll_video0", pll_parents, /* name, parents */ 0x10, /* offset */ @@ -314,7 +314,7 @@ FIXED_CLK(pll_video0_2x_clk, 1, /* div */ 0); /* flags */ -NM_CLK_WITH_FRAC(pll_ve_clk, +FRAC_CLK(pll_ve_clk, CLK_PLL_VE, /* id */ "pll_ve", pll_parents, /* name, parents */ 0x18, /* offset */ @@ -360,7 +360,7 @@ FIXED_CLK(pll_periph_2x_clk, 1, /* div */ 0); /* flags */ -NM_CLK_WITH_FRAC(pll_video1_clk, +FRAC_CLK(pll_video1_clk, CLK_PLL_VIDEO1, /* id */ "pll_video1", pll_parents, /* name, parents */ 0x30, /* offset */ @@ -381,7 +381,7 @@ FIXED_CLK(pll_video1_2x_clk, 1, /* div */ 0); /* flags */ -NM_CLK_WITH_FRAC(pll_gpu_clk, +FRAC_CLK(pll_gpu_clk, CLK_PLL_GPU, /* id */ "pll_gpu", pll_parents, /* name, parents */ 0x38, /* offset */ @@ -405,7 +405,7 @@ NKMP_CLK(pll_mipi_clk, 28, 1000, /* lock */ AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ -NM_CLK_WITH_FRAC(pll9_clk, +FRAC_CLK(pll9_clk, CLK_PLL9, /* id */ "pll9", pll_parents, /* name, parents */ 0x44, /* offset */ @@ -416,7 +416,7 @@ NM_CLK_WITH_FRAC(pll9_clk, 270000000, 297000000, /* freq0, freq1 */ 24, 25); /* mode sel, freq sel */ -NM_CLK_WITH_FRAC(pll10_clk, +FRAC_CLK(pll10_clk, CLK_PLL10, /* id */ "pll10", pll_parents, /* name, parents */ 0x48, /* offset */ @@ -869,12 +869,12 @@ static struct aw_ccung_clk a31_ccu_clks[] = { { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_mipi_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_video0_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_ve_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_video1_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_gpu_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll9_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll10_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_video0_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_ve_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_video1_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_gpu_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll9_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll10_clk}, { .type = AW_CLK_NM, .clk.nm = &apb2_clk}, { .type = AW_CLK_NM, .clk.nm = &nand0_clk}, { .type = AW_CLK_NM, .clk.nm = &nand1_clk}, Modified: head/sys/arm/allwinner/clkng/ccu_a64.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_a64.c Thu May 23 17:35:40 2019 (r348180) +++ head/sys/arm/allwinner/clkng/ccu_a64.c Thu May 23 17:36:19 2019 (r348181) @@ -279,7 +279,7 @@ FIXED_CLK(pll_audio_8x_clk, 0); /* flags */ static const char *pll_video0_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_video0_clk, +FRAC_CLK(pll_video0_clk, CLK_PLL_VIDEO0, /* id */ "pll_video0", pll_video0_parents, /* name, parents */ 0x10, /* offset */ @@ -300,7 +300,7 @@ FIXED_CLK(pll_video0_2x_clk, 0); /* flags */ static const char *pll_ve_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_ve_clk, +FRAC_CLK(pll_ve_clk, CLK_PLL_VE, /* id */ "pll_ve", pll_ve_parents, /* name, parents */ 0x18, /* offset */ @@ -370,7 +370,7 @@ FIXED_CLK(pll_periph1_clk, 0); /* flags */ static const char *pll_video1_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_video1_clk, +FRAC_CLK(pll_video1_clk, CLK_PLL_VIDEO1, /* id */ "pll_video1", pll_video1_parents, /* name, parents */ 0x30, /* offset */ @@ -382,7 +382,7 @@ NM_CLK_WITH_FRAC(pll_video1_clk, 24, 25); /* mode sel, freq sel */ static const char *pll_gpu_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_gpu_clk, +FRAC_CLK(pll_gpu_clk, CLK_PLL_GPU, /* id */ "pll_gpu", pll_gpu_parents, /* name, parents */ 0x38, /* offset */ @@ -396,7 +396,7 @@ NM_CLK_WITH_FRAC(pll_gpu_clk, /* PLL MIPI is missing */ static const char *pll_hsic_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_hsic_clk, +FRAC_CLK(pll_hsic_clk, CLK_PLL_HSIC, /* id */ "pll_hsic", pll_hsic_parents, /* name, parents */ 0x44, /* offset */ @@ -408,7 +408,7 @@ NM_CLK_WITH_FRAC(pll_hsic_clk, 24, 25); /* mode sel, freq sel */ static const char *pll_de_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_de_clk, +FRAC_CLK(pll_de_clk, CLK_PLL_DE, /* id */ "pll_de", pll_de_parents, /* name, parents */ 0x48, /* offset */ @@ -723,16 +723,18 @@ NM_CLK(gpu_clk, static struct aw_ccung_clk a64_ccu_clks[] = { { .type = AW_CLK_NKMP, .clk.nkmp = &pll_cpux_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_audio_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_video0_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_ve_clk}, + { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr0_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph0_2x_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph1_2x_clk}, - { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr0_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_video1_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_gpu_clk}, + /* PLL_MIPI */ + { .type = AW_CLK_FRAC, .clk.frac = &pll_hsic_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_de_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr1_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_video0_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_video1_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_ve_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_gpu_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_de_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_hsic_clk}, + { .type = AW_CLK_NM, .clk.nm = &apb2_clk}, { .type = AW_CLK_NM, .clk.nm = &nand_clk}, { .type = AW_CLK_NM, .clk.nm = &mmc0_clk}, Modified: head/sys/arm/allwinner/clkng/ccu_h3.c ============================================================================== --- head/sys/arm/allwinner/clkng/ccu_h3.c Thu May 23 17:35:40 2019 (r348180) +++ head/sys/arm/allwinner/clkng/ccu_h3.c Thu May 23 17:36:19 2019 (r348181) @@ -297,7 +297,7 @@ FIXED_CLK(pll_audio_8x_clk, 0); /* flags */ static const char *pll_video_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_video_clk, +FRAC_CLK(pll_video_clk, CLK_PLL_VIDEO, /* id */ "pll_video", pll_video_parents, /* name, parents */ 0x10, /* offset */ @@ -309,7 +309,7 @@ NM_CLK_WITH_FRAC(pll_video_clk, 24, 25); /* mode sel, freq sel */ static const char *pll_ve_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_ve_clk, +FRAC_CLK(pll_ve_clk, CLK_PLL_VE, /* id */ "pll_ve", pll_ve_parents, /* name, parents */ 0x18, /* offset */ @@ -357,7 +357,7 @@ FIXED_CLK(pll_periph0_2x_clk, 0); /* flags */ static const char *pll_gpu_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_gpu_clk, +FRAC_CLK(pll_gpu_clk, CLK_PLL_GPU, /* id */ "pll_gpu", pll_gpu_parents, /* name, parents */ 0x38, /* offset */ @@ -382,7 +382,7 @@ NKMP_CLK(pll_periph1_clk, AW_CLK_HAS_GATE | AW_CLK_HAS_LOCK); /* flags */ static const char *pll_de_parents[] = {"osc24M"}; -NM_CLK_WITH_FRAC(pll_de_clk, +FRAC_CLK(pll_de_clk, CLK_PLL_DE, /* id */ "pll_de", pll_de_parents, /* name, parents */ 0x48, /* offset */ @@ -684,10 +684,10 @@ static struct aw_ccung_clk h3_ccu_clks[] = { { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph0_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_periph1_clk}, { .type = AW_CLK_NKMP, .clk.nkmp = &pll_ddr_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_video_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_ve_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_gpu_clk}, - { .type = AW_CLK_NM, .clk.nm = &pll_de_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_video_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_ve_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_gpu_clk}, + { .type = AW_CLK_FRAC, .clk.frac = &pll_de_clk}, { .type = AW_CLK_NM, .clk.nm = &apb2_clk}, { .type = AW_CLK_NM, .clk.nm = &nand_clk}, { .type = AW_CLK_NM, .clk.nm = &mmc0_clk},