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Date:      Sun, 19 Jul 2015 19:27:27 +0000 (UTC)
From:      Warren Block <wblock@FreeBSD.org>
To:        doc-committers@freebsd.org, svn-doc-all@freebsd.org, svn-doc-head@freebsd.org
Subject:   svn commit: r47018 - head/en_US.ISO8859-1/htdocs/news/status
Message-ID:  <201507191927.t6JJRRed029793@repo.freebsd.org>

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Author: wblock
Date: Sun Jul 19 19:27:26 2015
New Revision: 47018
URL: https://svnweb.freebsd.org/changeset/doc/47018

Log:
  Restore mysteriously lost portion of PCID report, add URL to repository
  commit.

Modified:
  head/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml

Modified: head/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml
==============================================================================
--- head/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml	Sun Jul 19 18:50:12 2015	(r47017)
+++ head/en_US.ISO8859-1/htdocs/news/status/report-2015-04-2015-06.xml	Sun Jul 19 19:27:26 2015	(r47018)
@@ -1085,6 +1085,11 @@
       </person>
     </contact>
 
+    <links>
+      <url href="https://svnweb.freebsd.org/base?view=revision&amp;revision=282684">Commit
+	r282684</url>
+    </links>
+
     <body>
       <p>Process-Context Identifiers (PCIDs) is a feature of the
 	Translation Lookaside Buffer (TLB) on Intel processors,
@@ -1128,7 +1133,28 @@
 	performed.  As result, the new implementation issues exactly
 	the same amount of shootdown IPIs as pmap which does not
 	utilize PCID.</p>
+
+      <p>Another change included with the PCID rewrite is a move of
+	the address space switching code from assembler to C source,
+	making the algorithm easier to understand and validate.</p>
+
+      <p>Measurements done with <tt>hwpmc(4)</tt> on a Haswell machine
+	indicated that the new implementation reduced the amount of
+	data TLB misses up to 10 times, without an impact on the IPI
+	counters.</p>
+
+      <p>The rewrite was committed to HEAD at r282684.</p>
+
+      <p>Note: AMD processors do not have PCID feature for host paging
+	(AMD provides ASIDs for SVM use).  But it is likely that AMD
+	processors do cache TLB translations for different address
+	spaces transparently, and snoop writes to the page tables to
+	invalidate the caches.</p>
     </body>
+
+    <sponsor>
+      The FreeBSD Foundation
+    </sponsor>
   </project>
 
   <project cat='proj'>



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