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Date:      Fri, 12 Jul 2002 00:56:11 -0700 (PDT)
From:      Peter Wemm <peter@FreeBSD.org>
To:        cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org
Subject:   cvs commit: src/sys/conf options.i386 options.pc98 src/sys/i386/i386 bios.c db_interface.c locore.s mp_machdep.c mpapic.c pmap.c support.s vm86.c src/sys/i386/include cpufunc.h pmap.h smp.h src/sys/i386/isa apic_vector.s intr_machdep.h ...
Message-ID:  <200207120756.g6C7uBjZ051826@freefall.freebsd.org>

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peter       2002/07/12 00:56:11 PDT

  Modified files:
    sys/conf             options.i386 options.pc98 
    sys/i386/i386        bios.c db_interface.c locore.s 
                         mp_machdep.c mpapic.c pmap.c support.s 
                         vm86.c 
    sys/i386/include     cpufunc.h pmap.h smp.h 
    sys/i386/isa         apic_vector.s intr_machdep.h 
    sys/kern             subr_witness.c 
  Log:
  Revive backed out pmap related changes from Feb 2002.  The highlights are:
  - It actually works this time, honest!
  - Fine grained TLB shootdowns for SMP on i386.  IPI's are very expensive,
    so try and optimize things where possible.
  - Introduce ranged shootdowns that can be done as a single IPI.
  - PG_G support for i386
  - Specific-cpu targeted shootdowns.  For example, there is no sense in
    globally purging the TLB cache for where we are stealing a page from
    the local unshared process on the local cpu.  Use pm_active to track
    this.
  - Add some instrumentation for the tlb shootdown code.
  - Rip out SMP code from <machine/cpufunc.h>
  - Try and fix some very bogus PG_G and PG_PS interactions that were bad
    enough to cause vm86 bios calls to break.  vm86 depended on our existing
    bugs and this was the cause of the VESA panics last time.
  - Fix the silly one-line error that caused the 'panic: bad pte' last time.
  - Fix a couple of other silly one-line errors that should have caused more
    pain than they did.
  
  Some more work is needed:
  - pmap_{zero,copy}_page[_idle].  These can be done without IPI's if we
    have a hook in cpu_switch.
  - The IPI handlers need some cleanup.  I have a bogus %ds load that can
    be avoided.
  - APTD handling is rather bogus and appears to be a large source of
    global TLB IPI shootdowns for no really good reason.
  
  I see speedups of between 1.5% and ~4% on buildworlds in a while 1 loop.
  I expect to see a bigger difference when there is significant pageout
  activity or the system otherwise has memory shortages.
  
  I have backed out a few optimizations that I had been using over the last
  few days in order to be a little more conservative.  I'll revisit these
  again over the next few days as the dust settles.
  
  New option:  DISABLE_PG_G - In case I missed something.
  
  Revision  Changes    Path
  1.172     +2 -1      src/sys/conf/options.i386
  1.147     +2 -1      src/sys/conf/options.pc98
  1.54      +8 -7      src/sys/i386/i386/bios.c
  1.66      +2 -2      src/sys/i386/i386/db_interface.c
  1.158     +3 -21     src/sys/i386/i386/locore.s
  1.188     +231 -23   src/sys/i386/i386/mp_machdep.c
  1.59      +0 -3      src/sys/i386/i386/mpapic.c
  1.337     +261 -249  src/sys/i386/i386/pmap.c
  1.91      +0 -36     src/sys/i386/i386/support.s
  1.47      +2 -0      src/sys/i386/i386/vm86.c
  1.126     +93 -75    src/sys/i386/include/cpufunc.h
  1.80      +5 -4      src/sys/i386/include/pmap.h
  1.71      +9 -1      src/sys/i386/include/smp.h
  1.84      +82 -5     src/sys/i386/isa/apic_vector.s
  1.42      +13 -7     src/sys/i386/isa/intr_machdep.h
  1.121     +3 -0      src/sys/kern/subr_witness.c

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