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Date:      Thu, 20 Jul 2000 21:35:38 +0200 (CEST)
From:      =?ISO-8859-1?Q?G=E9rard_Roudier?= <groudier@club-internet.fr>
To:        Matthew Jacob <mjacob@feral.com>
Cc:        freebsd-alpha@FreeBSD.ORG
Subject:   Re: more on- Re: fxp0 hangs on a PC164 using STABLE 
Message-ID:  <Pine.LNX.4.10.10007202121140.1919-100000@linux.local>
In-Reply-To: <Pine.BSF.4.10.10007201159110.45697-100000@beppo.feral.com>

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On Thu, 20 Jul 2000, Matthew Jacob wrote:

> > A memory barrier here would not help since they are implied by the ldq_=
l/stq_c
> > pair, but, hell, let's put one just for grins. Drew?

Hmmm... I meant, first revert the patch, then add the barriers.
Damn... I know I am idiot but I thought nobody else discovered it. ;)

> You are, btw, absolutely right, in general, about the usage of memory
> barriers. Any shared memory model device in alpha should be using barrier
> instructions. We're given them for free with I/O and Mem space register
> accesses, but you have to add them by hand otherwise. The Qlogic driver u=
ses
> them extensively.
>=20
> There's every reason to assume that they would be useful in i386 too, no?

They may well be so, for example, in the situation of the PCI device and
its software driver sharing a completion queue in memory. Then a
serialization instruction may be needed after having picked the completion
thing from the completion queue and before checking the associated status
data. This is due to the PII/PIII also reodering LOADs/STOREs in some way.

> It sounds to me that this would be a good argument for a simple inline or=
 asm
> for both i386 && alpha ports.

Agreed.

> Now, the sparc port will be more interesting because a plain 'memory barr=
ier'
> is not what's there - instead you have to do explicit address based flush=
ing
> and/or invalidation (depending on the platform).

Seems Linux does cope of that without too much complexity.

  G=E9rard.



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