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Message-Id: <200607062112.k66LCINs048865@repoman.freebsd.org>
From: Jung-uk Kim <jkim@FreeBSD.org>
Date: Thu, 6 Jul 2006 21:12:18 +0000 (UTC)
To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org
X-FreeBSD-CVS-Branch: HEAD
Cc: 
Subject: cvs commit: src/sys/dev/fdc fdc.c src/sys/dev/ic nec765.h
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jkim        2006-07-06 21:12:18 UTC

  FreeBSD src repository

  Modified files:
    sys/dev/fdc          fdc.c 
    sys/dev/ic           nec765.h 
  Log:
  Enhanced floppy controllers have Data Rate Select Register (DSR) at 0x3f4.
  Use it to reset controller and to select data rate.  According to Intel
  80277AA datasheet, software reset behaves the same as DOR reset except
  that it is self clearing.  National Semiconductor PC8477B datasheet says
  the same.  As a side effect, we no longer use Configuration Control
  Register (CCR) at 0x3f7 for these controllers, which is often missing
  in modern hardware.
  
  Revision  Changes    Path
  1.310     +24 -8     src/sys/dev/fdc/fdc.c
  1.12      +6 -0      src/sys/dev/ic/nec765.h