From owner-freebsd-arm@FreeBSD.ORG Wed Oct 31 21:20:14 2012 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id EFAA6B09 for ; Wed, 31 Oct 2012 21:20:14 +0000 (UTC) (envelope-from br@mx.bsdpad.com) Received: from mx.bsdpad.com (mx.bsdpad.com [50.22.178.118]) by mx1.freebsd.org (Postfix) with ESMTP id CF9768FC12 for ; Wed, 31 Oct 2012 21:20:14 +0000 (UTC) Received: from mx.bsdpad.com ([50.22.178.118]) by mx.bsdpad.com with esmtps (TLSv1:DHE-RSA-AES256-SHA:256) (Exim 4.80 (FreeBSD)) (envelope-from ) id 1TTfho-000Cfx-10; Wed, 31 Oct 2012 21:20:08 +0000 Received: (from br@localhost) by mx.bsdpad.com (8.14.5/8.14.5/Submit) id q9VLK7A9048728; Thu, 1 Nov 2012 01:20:07 +0400 (MSK) (envelope-from br) Date: Thu, 1 Nov 2012 01:20:07 +0400 From: Ruslan Bukin To: Warner Losh Subject: Re: exynos4412 hangs on enabling MMU Message-ID: <20121031212007.GA48430@jail.io> References: <20121030123231.GA91006@jail.io> <1351607803.1120.27.camel@revolution.hippie.lan> <7FA4A9AA-F217-4425-9A21-E0967237540C@bsdimp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <7FA4A9AA-F217-4425-9A21-E0967237540C@bsdimp.com> User-Agent: Mutt/1.5.21 (2010-09-15) Cc: freebsd-arm@freebsd.org X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Oct 2012 21:20:15 -0000 On Tue, Oct 30, 2012 at 10:08:21AM -0600, Warner Losh wrote: > > > On Tue, 2012-10-30 at 16:32 +0400, Ruslan Bukin wrote: > >> hello! > >> > >> exynos hangs on mcr cmd in this context: > >> > >> /* Enable MMU */ > >> [..] > >> orr r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE) > >> mcr p15, 0, r0, c1, c0, 0 > >> [..] > >> > >> without CPU_CONTROL_MMU_ENABLE flag, mcr command works, > >> but board hangs again on line: > >> str r3, [r1], #0x0004 /* get zero init data */ > >> > >> any suggestions? > >> > >> -Ruslan > > > > I'd be interested in tracking that down... I've been booting lots of armv5 boards lately and haven't seen this hang with current. just read CPU_CONTROL_MMU_ENABLE bit from arm using mrc command, and it shows that MMU is enabled after mcr cmd (without using CPU_CONTROL_MMU_ENABLE bit), and disabled before. So MMU switch seems works. but board still hangs on line: str r3, [r1], #0x0004 /* get zero init data */ -Ruslan