From owner-svn-src-all@freebsd.org Thu Sep 12 21:12:39 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id E18A7DA630; Thu, 12 Sep 2019 21:12:39 +0000 (UTC) (envelope-from johalun@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46Ts135N3Cz3HB8; Thu, 12 Sep 2019 21:12:39 +0000 (UTC) (envelope-from johalun@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 9BB6C24B6A; Thu, 12 Sep 2019 21:12:39 +0000 (UTC) (envelope-from johalun@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x8CLCdfK001134; Thu, 12 Sep 2019 21:12:39 GMT (envelope-from johalun@FreeBSD.org) Received: (from johalun@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x8CLCd4K001133; Thu, 12 Sep 2019 21:12:39 GMT (envelope-from johalun@FreeBSD.org) Message-Id: <201909122112.x8CLCd4K001133@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: johalun set sender to johalun@FreeBSD.org using -f From: Johannes Lundberg Date: Thu, 12 Sep 2019 21:12:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r352266 - stable/12/sys/compat/linuxkpi/common/include/linux X-SVN-Group: stable-12 X-SVN-Commit-Author: johalun X-SVN-Commit-Paths: stable/12/sys/compat/linuxkpi/common/include/linux X-SVN-Commit-Revision: 352266 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Sep 2019 21:12:39 -0000 Author: johalun Date: Thu Sep 12 21:12:39 2019 New Revision: 352266 URL: https://svnweb.freebsd.org/changeset/base/352266 Log: MFC r345103: Implement more PCI speed related functions and macros in the LinuxKPI. Submitted by: Johannes Lundberg Sponsored by: Limelight Networks Sponsored by: Mellanox Technologies Modified: stable/12/sys/compat/linuxkpi/common/include/linux/pci.h Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/compat/linuxkpi/common/include/linux/pci.h ============================================================================== --- stable/12/sys/compat/linuxkpi/common/include/linux/pci.h Thu Sep 12 20:46:46 2019 (r352265) +++ stable/12/sys/compat/linuxkpi/common/include/linux/pci.h Thu Sep 12 21:12:39 2019 (r352266) @@ -139,10 +139,13 @@ struct pci_device_id { #define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */ #define PCI_EXP_LNKCAP_SLS_2_5GB 0x01 /* Supported Link Speed 2.5GT/s */ #define PCI_EXP_LNKCAP_SLS_5_0GB 0x02 /* Supported Link Speed 5.0GT/s */ +#define PCI_EXP_LNKCAP_SLS_8_0GB 0x04 /* Supported Link Speed 8.0GT/s */ +#define PCI_EXP_LNKCAP_SLS_16_0GB 0x08 /* Supported Link Speed 16.0GT/s */ #define PCI_EXP_LNKCAP_MLW 0x03f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */ #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */ #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */ +#define PCI_EXP_LNKCAP2_SLS_16_0GB 0x10 /* Supported Link Speed 16.0GT/s */ #define PCI_EXP_LNKCTL_HAWD PCIEM_LINK_CTL_HAWD #define PCI_EXP_LNKCAP_CLKPM 0x00040000 @@ -157,10 +160,19 @@ enum pci_bus_speed { PCIE_SPEED_2_5GT, PCIE_SPEED_5_0GT, PCIE_SPEED_8_0GT, + PCIE_SPEED_16_0GT, }; enum pcie_link_width { - PCIE_LNK_WIDTH_UNKNOWN = 0xFF, + PCIE_LNK_WIDTH_RESRV = 0x00, + PCIE_LNK_X1 = 0x01, + PCIE_LNK_X2 = 0x02, + PCIE_LNK_X4 = 0x04, + PCIE_LNK_X8 = 0x08, + PCIE_LNK_X12 = 0x0c, + PCIE_LNK_X16 = 0x10, + PCIE_LNK_X32 = 0x20, + PCIE_LNK_WIDTH_UNKNOWN = 0xff, }; typedef int pci_power_t; @@ -889,6 +901,67 @@ static inline int pci_num_vf(struct pci_dev *dev) { return (0); +} + +static inline enum pci_bus_speed +pcie_get_speed_cap(struct pci_dev *dev) +{ + device_t root; + uint32_t lnkcap, lnkcap2; + int error, pos; + + root = device_get_parent(dev->dev.bsddev); + if (root == NULL) + return (PCI_SPEED_UNKNOWN); + root = device_get_parent(root); + if (root == NULL) + return (PCI_SPEED_UNKNOWN); + root = device_get_parent(root); + if (root == NULL) + return (PCI_SPEED_UNKNOWN); + + if (pci_get_vendor(root) == PCI_VENDOR_ID_VIA || + pci_get_vendor(root) == PCI_VENDOR_ID_SERVERWORKS) + return (PCI_SPEED_UNKNOWN); + + if ((error = pci_find_cap(root, PCIY_EXPRESS, &pos)) != 0) + return (PCI_SPEED_UNKNOWN); + + lnkcap2 = pci_read_config(root, pos + PCIER_LINK_CAP2, 4); + + if (lnkcap2) { /* PCIe r3.0-compliant */ + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) + return (PCIE_SPEED_2_5GT); + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) + return (PCIE_SPEED_5_0GT); + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) + return (PCIE_SPEED_8_0GT); + if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_16_0GB) + return (PCIE_SPEED_16_0GT); + } else { /* pre-r3.0 */ + lnkcap = pci_read_config(root, pos + PCIER_LINK_CAP, 4); + if (lnkcap & PCI_EXP_LNKCAP_SLS_2_5GB) + return (PCIE_SPEED_2_5GT); + if (lnkcap & PCI_EXP_LNKCAP_SLS_5_0GB) + return (PCIE_SPEED_5_0GT); + if (lnkcap & PCI_EXP_LNKCAP_SLS_8_0GB) + return (PCIE_SPEED_8_0GT); + if (lnkcap & PCI_EXP_LNKCAP_SLS_16_0GB) + return (PCIE_SPEED_16_0GT); + } + return (PCI_SPEED_UNKNOWN); +} + +static inline enum pcie_link_width +pcie_get_width_cap(struct pci_dev *dev) +{ + uint32_t lnkcap; + + pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap); + if (lnkcap) + return ((lnkcap & PCI_EXP_LNKCAP_MLW) >> 4); + + return (PCIE_LNK_WIDTH_UNKNOWN); } #endif /* _LINUX_PCI_H_ */