From owner-freebsd-hackers@FreeBSD.ORG Wed Sep 24 15:17:19 2003 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 8811016A4BF for ; Wed, 24 Sep 2003 15:17:19 -0700 (PDT) Received: from mail.speakeasy.net (mail12.speakeasy.net [216.254.0.212]) by mx1.FreeBSD.org (Postfix) with ESMTP id 134F143FFB for ; Wed, 24 Sep 2003 15:17:16 -0700 (PDT) (envelope-from jhb@FreeBSD.org) Received: (qmail 7123 invoked from network); 24 Sep 2003 22:17:15 -0000 Received: from unknown (HELO server.baldwin.cx) ([216.27.160.63]) (envelope-sender )encrypted SMTP for ; 24 Sep 2003 22:17:15 -0000 Received: from laptop.baldwin.cx (gw1.twc.weather.com [216.133.140.1]) by server.baldwin.cx (8.12.9/8.12.9) with ESMTP id h8OMHA6Y024914; Wed, 24 Sep 2003 18:17:10 -0400 (EDT) (envelope-from jhb@FreeBSD.org) Message-ID: X-Mailer: XFMail 1.5.4 on FreeBSD X-Priority: 3 (Normal) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 8bit MIME-Version: 1.0 In-Reply-To: <200309242203.h8OM3iMS041749@wattres.Watt.COM> Date: Wed, 24 Sep 2003 18:17:13 -0400 (EDT) From: John Baldwin To: (Steve Watt) X-Spam-Checker-Version: SpamAssassin 2.55 (1.174.2.19-2003-05-19-exp) cc: hackers@FreeBSD.org Subject: RE: PCI bridges & interrupts X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Sep 2003 22:17:19 -0000 X-List-Received-Date: Wed, 24 Sep 2003 22:17:19 -0000 On 24-Sep-2003 Steve Watt wrote: > On Sep 24, 16:38, John Baldwin wrote: > } Subject: RE: PCI bridges & interrupts > > And if I were clever, I would've mentioned that it's in the > same slot. And the IRQ that gets assigned (by reading the > dmesg, as well as reading out the register from config space) > is the same. Across bridges the interrupts get swizzled sort of. Which means that device 0,4,8,etc. INT A gets mapped to INT A on the front side of the bridge, device 1,5,7,etc. INT A gets mapped to INT B. etc. IIRC your device is at device 5.0, so it's INT A should be mapped to INT B of that slot, which should get a different interrupt. > } > What follows is the verbose dmesg from the boot up without the > } > riser (bridge), followed by diffs when booted with the riser. > } > > } > I'm looking for clues. It's about >< that far from working right, > } > and this almost looks like a FreeBSD issue. > } > > } > Buddy, can you spare a clue? Why isn't the ISR running? > } > } Have you tried 5.x? Basically, 4.x doesn't really have all the > } infrastructure to route interrupts, and if your BIOS screws it up, > } then you aren't going to get the right IRQ number hooked up. > > If the BIOS is screwing it up, it's somehow in the configuration > of the interrupt controller, which I thought was completely > owned by the OS. No, the BIOS sets it up and we may try to tweak it. In 5.x we fully tweak it now, but 4.x still relies on the BIOS to set this up. -- John Baldwin <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve!" - http://www.FreeBSD.org/