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Date:      Wed, 24 Oct 2001 16:01:44 -0700
From:      Mike Smith <msmith@freebsd.org>
To:        Luigi Rizzo <rizzo@aciri.org>
Cc:        hackers@freebsd.org, msmith@mass.dis.org
Subject:   Re: HW question -- can the CPU timeout on accesses to the PCI bus ? 
Message-ID:  <200110242301.f9ON1iC04455@mass.dis.org>
In-Reply-To: Message from Luigi Rizzo <rizzo@aciri.org>  of "Wed, 24 Oct 2001 11:59:39 PDT." <20011024115939.A46082@iguana.aciri.org> 

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> Well, the question is rather simple... i am running some experiments
> on system with severe load on the PCI bus (basically a router with 4 interfac
> es
> trying to forward 2..4 streams of 64-byte packets at 100Mbit/s (i.e. 144kpps
> on each stream), and from low level timing i notice that the
> time to access a status register in the card sometimes goes up in the
> sky (I have measured well over 10us under heavy load, whereas the
> normal time is in the order of 0.5-1us).
> 
> 10us is a fairly long time, and while i can explain it easily (there
> are 4 active cards in the system, each one with a transmit, receive
> and control engines trying to access the PCI bus -- and there are
> two bridges between the CPU and the card), i wonder if the CPU can
> potentially wait forever to get hold of the bus, or it eventually
> times out. If so, how can i tell that the operation failed ?

The PCI arbitrator should never allow the system to livelock in that
fashion.

Furthermore, since the cards will eventually run out of
descriptors/buffer space and require CPU intervention, you'll never
hit that situation.

And no, the CPU will not time out; it will block until it can get the
bus.

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