Date: Tue, 5 Jan 1999 04:58:17 +0100 (CET) From: pille@chillout.org To: FreeBSD-gnats-submit@FreeBSD.ORG Subject: kern/9320: new cpuid patch for 3.0-curent kernel for intel mendocino Message-ID: <199901050358.EAA42941@extreme.chillout.org>
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>Number: 9320
>Category: kern
>Synopsis: new cpuid patch for 3.0-curent kernel for intel mendocino
>Confidential: yes
>Severity: non-critical
>Priority: low
>Responsible: freebsd-bugs
>State: open
>Quarter:
>Keywords:
>Date-Required:
>Class: change-request
>Submitter-Id: current-users
>Arrival-Date: Mon Jan 4 20:00:00 PST 1999
>Closed-Date:
>Last-Modified:
>Originator: Bjoern 'pille' Karlowsky
>Release: FreeBSD 3.0-CURRENT i386
>Organization:
>Environment:
686 CPU from Intel (Mendocino)
>Description:
Intel Celeron CPU identification not in kernel and/or might be wrong,
this patch is for the newer type of Celeron codename Mendocino ( PII
core with 128 kb sync L2 cache). PII might still be wrong until core
stepping is used too.
>How-To-Repeat:
dmesg |grep CPU:
on a celeron/mendocino/PII system
>Fix:
diff for /sys/i386/i386/identcpu.c
I guess that cpu = CPU_PII should be present because mendocino core == PII, but
you might correct anything if necessary, I'm not a experienced programmer at all ;)
202c202,204
< case 0x50:
---
> case 0x50: /* older Celerons w/out cache have ID 0650 too and
> newer PII have 065*, so only core stepping is
> different here */
206c208,216
< default:
---
> case 0x60:
> strcat(cpu_model, "Celeron/Mendocino (quarter-micron, 128 Kbyte L2 cache, S.E.P. Package, 242 contact slot socket)");
> cpu = CPU_PII;
> break;
> case 0x65:
> strcat(cpu_model, "Celeron/Mendocino (quarter-micron, 128 Kbyte L2 cache, PPGA Package, Slot 1 socket");
> cpu = CPU_PII;
> break;
> default:
>Release-Note:
>Audit-Trail:
>Unformatted:
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