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Date:      Wed, 29 Jul 1998 08:45:41 -0500
From:      Karl Denninger  <karl@mcs.net>
To:        "Justin T. Gibbs" <gibbs@plutotech.com>
Cc:        scsi@FreeBSD.ORG
Subject:   Re: New problem - Adaptec cards with REV E on the sequencer chipset
Message-ID:  <19980729084541.25400@mcs.net>
In-Reply-To: <199807282130.PAA20328@pluto.plutotech.com>; from Justin T. Gibbs on Tue, Jul 28, 1998 at 03:25:00PM -0600
References:  <19980728123208.25000@mcs.net> <199807282130.PAA20328@pluto.plutotech.com>

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On Tue, Jul 28, 1998 at 03:25:00PM -0600, Justin T. Gibbs wrote:
> >Next silly question - is it possible that some of the other problems that
> >I've seen with the adapter wedging like this (both when idle and in data
> >phase) were caused by this on other-than-E rev cards?
> 
> The timed-out while idle case simply means that there was no activity on
> the bus at the time that the timeout occurred.  The card is not "wedged" in
> this case.  The error implies that for some reason a disconnected target
> didn't bother to reconnect.  As far as data-phase wedges, I don't think
> that this fix will apply to any other chip revision.  If you still see
> hangs even with the latest code, let me know.
> 
> --
> Justin

Ok.

My general theory has always been that getting timeouts in the data phase
usually indicates a cable or termination problem.  I was wondering if that
was really the case, or if I perhaps had seen a manifestation of the same
problem with earlier revision components.

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