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Date:      Wed, 07 Aug 1996 08:22:49 +0530
From:      A JOSEPH KOSHY <koshy@india.hp.com>
To:        "Michael L. VanLoon -- HeadCandy.com" <michaelv@HeadCandy.com>
Cc:        joerg_wunsch@uriah.heep.sax.de (Joerg Wunsch), freebsd-current@freebsd.org (FreeBSD-current users)
Subject:   Re: Patch to recognize AMD 5x86 cpus 
Message-ID:  <199608070252.AA276586370@fakir.india.hp.com>
In-Reply-To: Your message of "Tue, 06 Aug 1996 08:47:33 MST." <199608061547.IAA18751@MindBender.HeadCandy.com> 

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>>>> ""Michael L. VanLoon -- HeadCandy.com"" <michaelv@HeadCandy.com> writes
> 
> >As Michael L. VanLoon -- HeadCandy.com wrote:
> >> If you wanted to do this The "Correct" Way, you might be better off
> >> rewriting the CPU identification code in locore.s to a more general,
> 
> >                                           identcpu.c
> >(It has been divorced from locore.s some time ago.)
> 
> Is it modular, well abstracted, comprehensive and all encompassing?  I

Well from my (possibly inadequate) understanding, we now have a new
instruction `CPUID', which returns information about the CPU in the
register.  Sub-functions are requested using a sub-function code 
specified in %eax.

In order to detect if the CPUID instruction exists, the documented approach
is to check the writability of a bit in EFLAGS.  If the instruction exists,
we call it with %eax = 0 and 1 to extract the standard information about 
the chip.

>From this point the CPU implementations are allowed to diverge.  AMD for 
example, specifies that their K5 series of chips return more information 
about internal organization etc when %eax = 0x80000000-0x80000005.  Other 
vendors support different subfunction codes.

The code in -current retrieves the `basic' CPUID information in locore.s
and updates some globals.  identcpu.c then looks at this information to
determine the exact type/model of CPU and takes the appropriate action
specific to the chip.

To the best of my understanding, the -current code confirms to the `standard' 
intel recommended processor identification method and my code confirms 
to AMD's published processor identification procedure.

For more information you could look at intels processor recognition app-note
in the developers corner of their web-site.  AMD's documents on this
are similarly available on the web.

Koshy
<koshy@india.hp.com>		My Personal Opinions Only



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