From owner-svn-src-head@FreeBSD.ORG Sun Apr 19 20:19:14 2009 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C040C1065709; Sun, 19 Apr 2009 20:19:14 +0000 (UTC) (envelope-from rwatson@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 77AE98FC08; Sun, 19 Apr 2009 20:19:14 +0000 (UTC) (envelope-from rwatson@FreeBSD.org) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n3JKJEWc019187; Sun, 19 Apr 2009 20:19:14 GMT (envelope-from rwatson@svn.freebsd.org) Received: (from rwatson@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n3JKJDa6019179; Sun, 19 Apr 2009 20:19:13 GMT (envelope-from rwatson@svn.freebsd.org) Message-Id: <200904192019.n3JKJDa6019179@svn.freebsd.org> From: Robert Watson Date: Sun, 19 Apr 2009 20:19:13 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r191276 - in head/sys: amd64/include arm/include i386/include ia64/include mips/include powerpc/include sparc64/include sun4v/include X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 19 Apr 2009 20:19:15 -0000 Author: rwatson Date: Sun Apr 19 20:19:13 2009 New Revision: 191276 URL: http://svn.freebsd.org/changeset/base/191276 Log: For each architecture, define CACHE_LINE_SHIFT and a derived CACHE_LINE_SIZE constant. These constants are intended to over-estimate the cache line size, and be used at compile-time when a run-time tuning alternative isn't appropriate or available. Defaults for all architectures are 64 bytes, except powerpc where it is 128 bytes (used on G5 systems). MFC after: 2 weeks Discussed on: arch@ Modified: head/sys/amd64/include/param.h head/sys/arm/include/param.h head/sys/i386/include/param.h head/sys/ia64/include/param.h head/sys/mips/include/param.h head/sys/powerpc/include/param.h head/sys/sparc64/include/param.h head/sys/sun4v/include/param.h Modified: head/sys/amd64/include/param.h ============================================================================== --- head/sys/amd64/include/param.h Sun Apr 19 18:23:23 2009 (r191275) +++ head/sys/amd64/include/param.h Sun Apr 19 20:19:13 2009 (r191276) @@ -89,6 +89,10 @@ #define ALIGN(p) _ALIGN(p) #define ALIGNED_POINTER(p,t) _ALIGNED_POINTER(p,t) +#ifndef CACHE_LINE_SHIFT +#define CACHE_LINE_SHIFT 6 +#endif +#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) /* Size of the level 1 page table units */ #define NPTEPG (PAGE_SIZE/(sizeof (pt_entry_t))) Modified: head/sys/arm/include/param.h ============================================================================== --- head/sys/arm/include/param.h Sun Apr 19 18:23:23 2009 (r191275) +++ head/sys/arm/include/param.h Sun Apr 19 20:19:13 2009 (r191276) @@ -81,6 +81,11 @@ #define ALIGNBYTES _ALIGNBYTES #define ALIGN(p) _ALIGN(p) +#ifndef CACHE_LINE_SHIFT +#define CACHE_LINE_SHIFT 6 +#endif +#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) + #define PAGE_SHIFT 12 #define PAGE_SIZE (1 << PAGE_SHIFT) /* Page size */ #define PAGE_MASK (PAGE_SIZE - 1) Modified: head/sys/i386/include/param.h ============================================================================== --- head/sys/i386/include/param.h Sun Apr 19 18:23:23 2009 (r191275) +++ head/sys/i386/include/param.h Sun Apr 19 20:19:13 2009 (r191276) @@ -74,6 +74,11 @@ #define ALIGNBYTES _ALIGNBYTES #define ALIGN(p) _ALIGN(p) +#ifndef CACHE_LINE_SHIFT +#define CACHE_LINE_SHIFT 6 +#endif +#define CACHE_LINE_SIZE (1 << CACHE_LINE_SHIFT) + #define PAGE_SHIFT 12 /* LOG2(PAGE_SIZE) */ #define PAGE_SIZE (1<