Date: Fri, 29 Nov 1996 17:08:33 -0700 From: Steve Passe <smp@csn.net> To: freebsd-smp@freebsd.org Subject: Re: SMP-current hang problems. Message-ID: <199611300008.RAA00982@clem.systemsix.com>
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Hi, sorry about that, I sent a patch to a patch.... this should be for real: --------------------------------------- cut ----------------------------------- *** mpboot.s.old 1996/11/29 22:50:07 1.1 --- mpboot.s 1996/11/29 23:19:37 *************** *** 30,35 **** --- 30,36 ---- * * mpboot.s: FreeBSD machine support for the Intel MP Spec * multiprocessor systems. + * $Id$ */ *************** *** 62,77 **** * Wait for the booting CPU to signal startup */ mp_begin: /* now running relocated at KERNBASE */ call _init_secondary /* load i386 tables */ /** * FIXME: this code is of little value at the moment, * going to a SYMMETRIC IO mode will change that. */ ! movl _apic_base, %esi ! movl APIC_SVR(%esi), %eax /* get spurious vector reg. */ ! orl $0x00000100, %eax /* This bit enables the APIC */ ! movl %eax, APIC_SVR(%esi) #if 0 /* the alternate CPU is not ready to receive interrupts yet */ movl APIC_LVT1(%esi), %eax /* Setup LVT1 as ExtINT */ andl $0xfffe58ff, %eax --- 63,98 ---- * Wait for the booting CPU to signal startup */ mp_begin: /* now running relocated at KERNBASE */ + movl _apic_base, %esi + + movl APIC_SVR(%esi), %eax /* get spurious vector reg. */ + andl $~0x00000100, %eax /* disable the APIC */ + movl %eax, APIC_SVR(%esi) + + movl APIC_VER(%esi), %eax + movl %eax, _cpuApicVersions + incl _mp_ncpus + + /* One at a time, we are running on the shared mp_stk */ + /* This is the Intel reccomended semaphore method */ + movb $0xff, %al + 2: + xchgb %al, bootlock /* xchg is implicitly locked */ + cmpb $0xff, %al + jz 2b + call _init_secondary /* load i386 tables */ /** * FIXME: this code is of little value at the moment, * going to a SYMMETRIC IO mode will change that. */ ! ! /* ensure APs will not accept BROADCAST INTs sent in LOPRIO mode */ ! movl APIC_TPR(%esi), %eax /* get current TPR */ ! orl $0x000000ff, %eax /* block all INTs */ ! movl %eax, APIC_TPR(%esi) /* put new TPR */ ! #if 0 /* the alternate CPU is not ready to receive interrupts yet */ movl APIC_LVT1(%esi), %eax /* Setup LVT1 as ExtINT */ andl $0xfffe58ff, %eax *************** *** 83,110 **** orl $0xffff0400, %eax movl %eax, APIC_LVT2(%esi) ! /* ensure APs will not accept BROADCAST INTs sent in LOPRIO mode */ ! movl APIC_TPR(%esi), %eax /* get current TPR */ ! orl $0x000000ff, %eax /* block all INTs */ ! movl %eax, APIC_TPR(%esi) /* put new TPR */ /* :EMXIF **/ ! movl APIC_VER(%esi), %eax ! movl %eax, _cpuApicVersions ! incl _mp_ncpus ! 1: movl _smp_active, %eax cmpl $0, %eax jz 1b ! ! /* One at a time, we are running on the shared mp_stk */ ! /* This is the Intel reccomended semaphore method */ ! movb $0xff, %al ! 2: ! xchgb %al, bootlock /* xchg is implicitly locked */ ! cmpb $0xff, %al ! jz 2b ! /* Now, let's do some REAL WORK :-) */ call _get_mplock call _secondary_main --- 104,119 ---- orl $0xffff0400, %eax movl %eax, APIC_LVT2(%esi) ! movl APIC_SVR(%esi), %eax /* get spurious vector reg. */ ! orl $0x00000100, %eax /* This bit enables the APIC */ ! movl %eax, APIC_SVR(%esi) /* :EMXIF **/ ! #if 0 1: movl _smp_active, %eax cmpl $0, %eax jz 1b ! #endif /* Now, let's do some REAL WORK :-) */ call _get_mplock call _secondary_main --------------------------------------- cut ----------------------------------- -- Steve Passe | powered by smp@csn.net | FreeBSD
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