Date: Fri, 2 May 2003 15:45:52 -0700 (PDT) From: Juli Mallett <jmallett@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 30419 for review Message-ID: <200305022245.h42MjqLV051505@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=30419 Change 30419 by jmallett@jmallett_dalek on 2003/05/02 15:45:26 Voodoo-free locore.S. Affected files ... .. //depot/projects/mips/sys/mips/mips/locore.S#5 edit Differences ... ==== //depot/projects/mips/sys/mips/mips/locore.S#5 (text+ko) ==== @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2002 Juli Mallett <jmallett@FreeBSD.org> + * Copyright (c) 2003 Juli Mallett <jmallett@FreeBSD.org> * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -28,12 +28,17 @@ #include <machine/asm.h> #include <machine/cpuregs.h> +#incldue <machine/param.h> + +#include "assym.s" .data /* * Dummy interrupt table to keep sysctl happy until * it's worked out what to do with naming */ +GLOBAL(stackspace) + .space 16384 GLOBAL(intrnames) .asciz "dummy" GLOBAL(eintrnames) @@ -45,49 +50,41 @@ .set noreorder .text - .globl start -start: - # Just keep the boot exception vector and soft reset bits around, - # disable interrupts. - mfc0 t0, MIPS_COP_0_STATUS - and t0, MIPS_SR_BEV | MIPS3_SR_SR - mtc0 t0, MIPS_COP_0_STATUS +ENTRY(btext) +ENTRY(start) + # t0: Bits to preserve if set: + # Soft reset + # Boot exception vectors (firmware-provided) + li t0, MIPS_SR_BEV | MIPS3_SR_SR + # t1: Bits to set explicitly: + # Kernel mode is 64-bit + # Enable FPU + li t1, MIPS3_SR_KX | MIPS_SR_COP_1_BIT + + # Read coprocessor 0 status register, clear bits not + # preserved (namely, clearing interrupt bits), and set + # bits we want to explicitly set. + mfc0 t2, MIPS_COP_0_STATUS + and t2, t0 + or t2, t1 + mtc0 t2, MIPS_COP_0_STATUS COP0_SYNC + # Extra nops for the FPU to spin up. - # Zero the Cause register in case any software interrupt bits are set. + # Clear cause register. mtc0 zero, MIPS_COP_0_CAUSE COP0_SYNC - # If the stack pointer is above this function's address, or more than - # 4K below it, then we should set it to the address of this function - # minus the amount of stack needed to call a function in C, otherwise - # just use it. - la t1, start - bgt sp, t1, 1f - addu t2, t1, -CALLFRAME_SIZ - subu t0, t1, sp - bgt t0, 4096, 1f - nop - move t2, sp -1: move sp, t2 - - # Turn on the FPU. - mfc0 t0, MIPS_COP_0_STATUS - or t0, MIPS_SR_COP_1_BIT - mtc0 t0, MIPS_COP_0_STATUS - nop - nop - nop - nop - COP0_SYNC - - # Get the processor ID from coprocessor 0, and the FPU ID from - # coprocessor 1. + # Read and store the PrID FPU ID for CPU identification. mfc0 t0, MIPS_COP_0_PRID cfc1 t1, MIPS_FPU_ID sw t0, cpu_id sw t1, fpu_id + # Set up our temporary stack. + la sp, stackspace + addu sp, 16384 + # Call the platform-specific startup code. jal platform_start nop @@ -97,3 +94,4 @@ nop # NOTREACHED +END(start)
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