From owner-freebsd-arch Fri Jun 28 9:54:27 2002 Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.FreeBSD.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 294D737B405 for ; Fri, 28 Jun 2002 09:54:14 -0700 (PDT) Received: from mail.speakeasy.net (mail15.speakeasy.net [216.254.0.215]) by mx1.FreeBSD.org (Postfix) with ESMTP id 3578443E06 for ; Fri, 28 Jun 2002 09:54:12 -0700 (PDT) (envelope-from jhb@FreeBSD.org) Received: (qmail 12929 invoked from network); 26 Jun 2002 18:11:07 -0000 Received: from unknown (HELO server.baldwin.cx) ([216.27.160.63]) (envelope-sender ) by mail15.speakeasy.net (qmail-ldap-1.03) with DES-CBC3-SHA encrypted SMTP for ; 26 Jun 2002 18:11:07 -0000 Received: from laptop.baldwin.cx (gw1.twc.weather.com [216.133.140.1]) by server.baldwin.cx (8.11.6/8.11.6) with ESMTP id g5QIB6b70191; Wed, 26 Jun 2002 14:11:06 -0400 (EDT) (envelope-from jhb@FreeBSD.org) Message-ID: X-Mailer: XFMail 1.5.2 on FreeBSD X-Priority: 3 (Normal) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 8bit MIME-Version: 1.0 In-Reply-To: <200206201035.g5KAZ53i029301@rina.r.dl.itc.u-tokyo.ac.jp> Date: Wed, 26 Jun 2002 14:11:09 -0400 (EDT) From: John Baldwin To: Seigo Tanimura Subject: RE: multiple threads for interrupts Cc: arch@FreeBSD.org Sender: owner-freebsd-arch@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG On 20-Jun-2002 Seigo Tanimura wrote: > At the moment, each interrupt type (hardware and swi) has only one > kernel thread to handle interrupts. This can be a potential > bottleneck in an SMP host because virtually only up to one processor > can handle interrupts. > > One solution is to run multiple threads for each of the interrupt > types. Since I noticed this issue first during my work of network > locking, I have been tweaking the swi subsystem so that it runs > multiple threads for an swi type. For those who are interested, the > patch can be found at: > > http://people.FreeBSD.org/~tanimura/patches/swipool.diff.gz > > While I worked on only swis, hardware interrupts should suffer from > the same issue as well. Thus it would be better to tweak the general > interrupt mechanism rather than only the swi subsystem. I will see > how that works in the next few days. > > Comments and flames are welcome. Thanks a lot. I think this is mostly a feature rather than a bug. Allowing more than one handler to execute at a time requires you to use a semaphore or some such to coordinate when you actually enable the interrupt source again. I also think that you are better off waiting for KSE to finish and for us to support per-CPU runqueues with binding so that for processes where it makes sense to do this (like netisr and possibly the cam stuff, ktrace is another potential candidate), you use bound per-cpu threads that still belong to the same process to do this. FWIW, Solaris doesn't use multiple threads for a shared interrupt, instead, when an ithread is awakened, it is bound to the CPU receiving the interrupt until it finishes. If you don't have a copy of Solaris Internals I would recommend getting a copy. :) We don't have to be the next Solaris, but we can learn a lot by looking at it. -- John Baldwin <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve!" - http://www.FreeBSD.org/ To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-arch" in the body of the message