From owner-svn-src-stable@FreeBSD.ORG Mon Sep 20 17:39:50 2010 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 14B951065679; Mon, 20 Sep 2010 17:39:50 +0000 (UTC) (envelope-from gibbs@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 02F488FC1B; Mon, 20 Sep 2010 17:39:50 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o8KHdn2o060631; Mon, 20 Sep 2010 17:39:49 GMT (envelope-from gibbs@svn.freebsd.org) Received: (from gibbs@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o8KHdnuD060627; Mon, 20 Sep 2010 17:39:49 GMT (envelope-from gibbs@svn.freebsd.org) Message-Id: <201009201739.o8KHdnuD060627@svn.freebsd.org> From: "Justin T. Gibbs" Date: Mon, 20 Sep 2010 17:39:49 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org X-SVN-Group: stable-8 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r212907 - in stable/8/sys/dev/aic7xxx: . aicasm X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Sep 2010 17:39:50 -0000 Author: gibbs Date: Mon Sep 20 17:39:49 2010 New Revision: 212907 URL: http://svn.freebsd.org/changeset/base/212907 Log: MFC r210055: Correct logic bug in aicasm's undefined register bit access detection code. The code in question verifies that all register write operations only change bits that are defined (in the register definition file) for that effected register. The bug effectively disabled this checking. o Fix the check by testing the opcode against all supported read ("and" based) operands. o Add missing bit definitions to the aic7xxx and aic79xx register definition files so that the warning (treated as a fatal error) does not spuriously fire. Modified: stable/8/sys/dev/aic7xxx/aic79xx.reg stable/8/sys/dev/aic7xxx/aic7xxx.reg stable/8/sys/dev/aic7xxx/aicasm/aicasm_gram.y Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) stable/8/sys/dev/xen/xenpci/ (props changed) Modified: stable/8/sys/dev/aic7xxx/aic79xx.reg ============================================================================== --- stable/8/sys/dev/aic7xxx/aic79xx.reg Mon Sep 20 17:10:06 2010 (r212906) +++ stable/8/sys/dev/aic7xxx/aic79xx.reg Mon Sep 20 17:39:49 2010 (r212907) @@ -3813,6 +3813,7 @@ scb { SCB_RESIDUAL_SGPTR { size 4 field SG_ADDR_MASK 0xf8 /* In the last byte */ + field SG_ADDR_BIT 0x04 field SG_OVERRUN_RESID 0x02 /* In the first byte */ field SG_LIST_NULL 0x01 /* In the first byte */ } Modified: stable/8/sys/dev/aic7xxx/aic7xxx.reg ============================================================================== --- stable/8/sys/dev/aic7xxx/aic7xxx.reg Mon Sep 20 17:10:06 2010 (r212906) +++ stable/8/sys/dev/aic7xxx/aic7xxx.reg Mon Sep 20 17:39:49 2010 (r212907) @@ -1448,6 +1448,7 @@ scratch_ram { mask EXIT_MSG_LOOP 0x08 mask CONT_MSG_LOOP 0x04 mask CONT_TARG_SESSION 0x02 + mask SPARE 0x01 alias RETURN_1 } ARG_2 { Modified: stable/8/sys/dev/aic7xxx/aicasm/aicasm_gram.y ============================================================================== --- stable/8/sys/dev/aic7xxx/aicasm/aicasm_gram.y Mon Sep 20 17:10:06 2010 (r212906) +++ stable/8/sys/dev/aic7xxx/aicasm/aicasm_gram.y Mon Sep 20 17:39:49 2010 (r212907) @@ -1821,9 +1821,15 @@ type_check(symbol_t *symbol, expression_ { symbol_node_t *node; int and_op; + uint8_t invalid_bits; and_op = FALSE; - if (opcode == AIC_OP_AND || opcode == AIC_OP_JNZ || AIC_OP_JZ) + if (opcode == AIC_OP_AND + || opcode == AIC_OP_BMOV + || opcode == AIC_OP_JE + || opcode == AIC_OP_JNE + || opcode == AIC_OP_JNZ + || opcode == AIC_OP_JZ) and_op = TRUE; /* @@ -1831,12 +1837,11 @@ type_check(symbol_t *symbol, expression_ * that hasn't been defined. If this is an and operation, * this is a mask, so "undefined" bits are okay. */ - if (and_op == FALSE - && (expression->value & ~symbol->info.rinfo->valid_bitmask) != 0) { + invalid_bits = expression->value & ~symbol->info.rinfo->valid_bitmask; + if (and_op == FALSE && invalid_bits != 0) { snprintf(errbuf, sizeof(errbuf), "Invalid bit(s) 0x%x in immediate written to %s", - expression->value & ~symbol->info.rinfo->valid_bitmask, - symbol->name); + invalid_bits, symbol->name); stop(errbuf, EX_DATAERR); /* NOTREACHED */ }