From owner-freebsd-threads@FreeBSD.ORG Sat Jul 12 12:51:28 2003 Return-Path: Delivered-To: freebsd-threads@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 2467D37B404; Sat, 12 Jul 2003 12:51:28 -0700 (PDT) Received: from silver.he.iki.fi (silver.he.iki.fi [193.64.42.241]) by mx1.FreeBSD.org (Postfix) with ESMTP id B3F0643F85; Sat, 12 Jul 2003 12:51:26 -0700 (PDT) (envelope-from pete@he.iki.fi) Received: from PETEX31 (h81.vuokselantie10.fi [193.64.42.129]) by silver.he.iki.fi (8.12.9/8.11.4) with SMTP id h6CJpPsL070889; Sat, 12 Jul 2003 22:51:25 +0300 (EEST) (envelope-from pete@he.iki.fi) Message-ID: <005501c348ae$f9ff8dd0$812a40c1@PETEX31> From: "Petri Helenius" To: "Mike Makonnen" References: <001b01c3463a$0f907a00$0100a8c0@alpha> <006401c3464d$de848a00$812a40c1@PETEX31> <20030710001204.GB10504@kokeb.ambesa.net> Date: Sat, 12 Jul 2003 22:51:24 +0300 MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2800.1158 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2800.1165 cc: freebsd-performance@freebsd.org cc: Kai Mosebach cc: freebsd-threads@freebsd.org Subject: Re: LinuxThreads replacement X-BeenThere: freebsd-threads@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Threading on FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 12 Jul 2003 19:51:28 -0000 > > It's not as simple as that. In practice a lot of factors about > your system and the type of work you're doing will affect the > performance. On paper, the SA/KSE method is supposed to combine > the best aspects of 1:1 (libthr) and N:1 (libc_r), and should > threoretically be "better" than either one. But, in practice, > complexity and overhead may drown out the performance gains. > Conversely, context switching overhead may not be as great a > penalty for the 1:1 model on modern cpus. > Anyone have any numbers of different architechtures for the context switch? AMD64? Itanium? i386? PPC? Sparc? How about interrupt latency? SMP coherency overhead? The basic memory bandwidth has become a marketing thing so the raw megabytes per second are readily available but in multiprocessor and multithreaded environment there is a lot more into it. Pete