From owner-svn-src-all@freebsd.org Sun Jul 10 20:22:05 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id A62C4B85E1E; Sun, 10 Jul 2016 20:22:05 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7568D1D18; Sun, 10 Jul 2016 20:22:05 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u6AKM4b9021320; Sun, 10 Jul 2016 20:22:04 GMT (envelope-from mav@FreeBSD.org) Received: (from mav@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u6AKM4MY021319; Sun, 10 Jul 2016 20:22:04 GMT (envelope-from mav@FreeBSD.org) Message-Id: <201607102022.u6AKM4MY021319@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mav set sender to mav@FreeBSD.org using -f From: Alexander Motin Date: Sun, 10 Jul 2016 20:22:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r302531 - head/sys/dev/ntb/ntb_hw X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 10 Jul 2016 20:22:05 -0000 Author: mav Date: Sun Jul 10 20:22:04 2016 New Revision: 302531 URL: https://svnweb.freebsd.org/changeset/base/302531 Log: Revert odd change, setting limit registers before base. I don't know what errata is mentioned there, I was unable to find it, but setting limit before the base simply does not work at all. According to specification attempt to set limit out of the present window range resets it to zero, effectively disabling it. And that is what I see in practice. Fixing this properly disables access for remote side to our memory until respective xlat is negotiated and set. As I see, Linux does the same. Modified: head/sys/dev/ntb/ntb_hw/ntb_hw.c Modified: head/sys/dev/ntb/ntb_hw/ntb_hw.c ============================================================================== --- head/sys/dev/ntb/ntb_hw/ntb_hw.c Sun Jul 10 19:52:26 2016 (r302530) +++ head/sys/dev/ntb/ntb_hw/ntb_hw.c Sun Jul 10 20:22:04 2016 (r302531) @@ -1699,26 +1699,22 @@ xeon_set_sbar_base_and_limit(struct ntb_ bar_addr = 0; } - /* - * Set limit registers first to avoid an errata where setting the base - * registers locks the limit registers. - */ if (!bar_is_64bit(ntb, idx)) { - ntb_reg_write(4, lmt_reg, bar_addr); - reg_val = ntb_reg_read(4, lmt_reg); - (void)reg_val; - ntb_reg_write(4, base_reg, bar_addr); reg_val = ntb_reg_read(4, base_reg); (void)reg_val; - } else { - ntb_reg_write(8, lmt_reg, bar_addr); - reg_val = ntb_reg_read(8, lmt_reg); - (void)reg_val; + ntb_reg_write(4, lmt_reg, bar_addr); + reg_val = ntb_reg_read(4, lmt_reg); + (void)reg_val; + } else { ntb_reg_write(8, base_reg, bar_addr); reg_val = ntb_reg_read(8, base_reg); (void)reg_val; + + ntb_reg_write(8, lmt_reg, bar_addr); + reg_val = ntb_reg_read(8, lmt_reg); + (void)reg_val; } }