From owner-svn-src-head@FreeBSD.ORG Tue Aug 18 20:20:16 2009 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 05DC31065696; Tue, 18 Aug 2009 20:20:16 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E7ACF8FC51; Tue, 18 Aug 2009 20:20:15 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n7IKKFu9027354; Tue, 18 Aug 2009 20:20:15 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n7IKKFtt027352; Tue, 18 Aug 2009 20:20:15 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <200908182020.n7IKKFtt027352@svn.freebsd.org> From: Pyun YongHyeon Date: Tue, 18 Aug 2009 20:20:15 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r196366 - head/sys/dev/mii X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Aug 2009 20:20:16 -0000 Author: yongari Date: Tue Aug 18 20:20:15 2009 New Revision: 196366 URL: http://svn.freebsd.org/changeset/base/196366 Log: Backout r193289. r193289 restored page select bits to previous value instead of blindly resetting it to 0. However, it seems page select bits of some 88E1116 PHY is initialized to invalid one such that restoring page select bits after programming broke MII register access. The correct solution would be reset page select bits to 0 in PHY attach stage but it would require more testing. Since we're in BETA stage such a change would be dangerous so just back it out. This change should fix nfe(4) breakage on NVIDIA MCP55. Reported by: Ryan Rogers < webmaster <> doghouserepair dot com > Sam Fourman Jr. < sfourman <> gmail dot com > Tested by: Ryan Rogers < webmaster <> doghouserepair dot com > Sam Fourman Jr. < sfourman <> gmail dot com > Approved by: re (kib) Modified: head/sys/dev/mii/e1000phy.c Modified: head/sys/dev/mii/e1000phy.c ============================================================================== --- head/sys/dev/mii/e1000phy.c Tue Aug 18 20:06:00 2009 (r196365) +++ head/sys/dev/mii/e1000phy.c Tue Aug 18 20:20:15 2009 (r196366) @@ -240,13 +240,11 @@ e1000phy_reset(struct mii_softc *sc) if (esc->mii_model == MII_MODEL_MARVELL_E1116 || esc->mii_model == MII_MODEL_MARVELL_E1149) { - page = PHY_READ(sc, E1000_EADR); - /* Select page 2, MAC specific control register. */ PHY_WRITE(sc, E1000_EADR, 2); reg = PHY_READ(sc, E1000_SCR); reg |= E1000_SCR_RGMII_POWER_UP; PHY_WRITE(sc, E1000_SCR, reg); - PHY_WRITE(sc, E1000_EADR, page); + PHY_WRITE(sc, E1000_EADR, 0); } }