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From: Marius Strobl <marius@FreeBSD.org>
Date: Wed, 17 Mar 2010 20:23:14 +0000 (UTC)
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Subject: cvs commit: src/sys/sparc64/include tlb.h tte.h
 src/sys/sparc64/sparc64 genassym.c pmap.c swtch.S
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marius      2010-03-17 20:23:14 UTC

  FreeBSD src repository

  Modified files:
    sys/sparc64/include  tlb.h tte.h 
    sys/sparc64/sparc64  genassym.c pmap.c swtch.S 
  Log:
  SVN rev 205258 on 2010-03-17 20:23:14Z by marius
  
  - Add TTE and context register bits for the additional page sizes supported
    by UltraSparc-IV and -IV+ as well as SPARC64 V, VI, VII and VIIIfx CPUs.
  - Replace TLB_PCXR_PGSZ_MASK and TLB_SCXR_PGSZ_MASK with TLB_CXR_PGSZ_MASK
    which just is the complement of TLB_CXR_CTX_MASK instead of trying to
    assemble it from the page size bits which vary across CPUs.
  - Add macros for the remainder of the SFSR bits, which are useful for at
    least debugging purposes.
  
  Revision  Changes    Path
  1.30      +25 -13    src/sys/sparc64/include/tlb.h
  1.19      +46 -17    src/sys/sparc64/include/tte.h
  1.78      +1 -1      src/sys/sparc64/sparc64/genassym.c
  1.186     +2 -2      src/sys/sparc64/sparc64/pmap.c
  1.39      +1 -1      src/sys/sparc64/sparc64/swtch.S