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Date:      Wed, 22 Nov 2000 00:03:35 -0700
From:      Warner Losh <imp@village.org>
To:        "Justin T. Gibbs" <gibbs@scsiguy.com>
Cc:        Mike Smith <msmith@FreeBSD.ORG>, wpaul@FreeBSD.ORG (Bill Paul), freebsd-current@FreeBSD.ORG
Subject:   Re: Getting at cardbus CIS data from inside drivers 
Message-ID:  <200011220703.AAA40559@harmony.village.org>
In-Reply-To: Your message of "Tue, 21 Nov 2000 23:23:09 MST." <200011220623.eAM6N9473750@aslan.scsiguy.com> 
References:  <200011220623.eAM6N9473750@aslan.scsiguy.com>  

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In message <200011220623.eAM6N9473750@aslan.scsiguy.com> "Justin T. Gibbs" writes:
: The ROM BAR is only implemented for function 0 and the ROM
: contains information for all functions of the chip.  So, functions
: greater than 0 must have the flexibility to activate at least the ROM
: BAR on function 0 as well as access that region.

I think there's a difference between where the CIS actually lives, and
the CIS chains for the each function.  cardbus cards give each
function its own CIS chain.  These CIS chains can live in
configuration space, in memory space or the expansion ROM (which I
assume is the same thing as the ROM BAR on function 0, but maybe I'm
mistaken) and the bridge is responsible for properlly mapping the last
two.

The config space presents the biggest problem because we don't have
any way to access it with the bus_space(9) functions, so special code
is needed in the cardbus bus driver to know where to read from.  I
talked with YAMAMOTO shigeru-san at BSDcon about an extension to the
bus_space code to allow user defined regions/functions to be used so
that one can write generic code to access each of these regions with
bus_space_read/write_N.  Since this is getting off topic, I'll leave
it there, but it looked cool and many of the issues I could think of
to bring up were handled well.

I also made an error in a previous message.  16-bit and 32bit cis
parsing is somewhat different.  16-bit cards effectively have the
functions comingled with global entries, while cardbus segregates
them.  With cardbus the iterated chain would just contain CIS entries
for that function.  They designed things this way so that the
functions could be completely separate, integrated only on an ASIC at
the last minute before being placed on a cardbus card :-)

Warner


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