From owner-svn-src-all@FreeBSD.ORG Sat Nov 16 00:31:35 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 11BFE425; Sat, 16 Nov 2013 00:31:35 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id E5D3A2F78; Sat, 16 Nov 2013 00:31:34 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rAG0VYvC052116; Sat, 16 Nov 2013 00:31:34 GMT (envelope-from edavis@svn.freebsd.org) Received: (from edavis@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id rAG0VX8N052105; Sat, 16 Nov 2013 00:31:33 GMT (envelope-from edavis@svn.freebsd.org) Message-Id: <201311160031.rAG0VX8N052105@svn.freebsd.org> From: Eric Davis Date: Sat, 16 Nov 2013 00:31:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r258203 - stable/10/sys/dev/bxe X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 16 Nov 2013 00:31:35 -0000 Author: edavis Date: Sat Nov 16 00:31:32 2013 New Revision: 258203 URL: http://svnweb.freebsd.org/changeset/base/258203 Log: Merge r258187 from head. Approved by: re@ (delphij) Approved by: davidch (mentor) Modified: stable/10/sys/dev/bxe/bxe.c stable/10/sys/dev/bxe/bxe.h stable/10/sys/dev/bxe/bxe_elink.c stable/10/sys/dev/bxe/ecore_hsi.h stable/10/sys/dev/bxe/ecore_init.h stable/10/sys/dev/bxe/ecore_reg.h stable/10/sys/dev/bxe/ecore_sp.c stable/10/sys/dev/bxe/ecore_sp.h Directory Properties: stable/10/sys/ (props changed) Modified: stable/10/sys/dev/bxe/bxe.c ============================================================================== --- stable/10/sys/dev/bxe/bxe.c Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/bxe.c Sat Nov 16 00:31:32 2013 (r258203) @@ -34,7 +34,7 @@ #include __FBSDID("$FreeBSD$"); -#define BXE_DRIVER_VERSION "1.78.18" +#define BXE_DRIVER_VERSION "1.78.75" #include "bxe.h" #include "ecore_sp.h" @@ -303,70 +303,70 @@ static int load_count[2][3] = { {0} }; / SYSCTL_NODE(_hw, OID_AUTO, bxe, CTLFLAG_RD, 0, "bxe driver parameters"); /* Debug */ -uint32_t bxe_debug = 0; -TUNABLE_INT("hw.bxe.debug", &bxe_debug); -SYSCTL_UINT(_hw_bxe, OID_AUTO, debug, (CTLFLAG_RDTUN), - &bxe_debug, 0, "Debug logging mode"); +unsigned long bxe_debug = 0; +TUNABLE_ULONG("hw.bxe.debug", &bxe_debug); +SYSCTL_ULONG(_hw_bxe, OID_AUTO, debug, (CTLFLAG_RDTUN), + &bxe_debug, 0, "Debug logging mode"); /* Interrupt Mode: 0 (IRQ), 1 (MSI/IRQ), and 2 (MSI-X/MSI/IRQ) */ static int bxe_interrupt_mode = INTR_MODE_MSIX; TUNABLE_INT("hw.bxe.interrupt_mode", &bxe_interrupt_mode); -SYSCTL_UINT(_hw_bxe, OID_AUTO, interrupt_mode, CTLFLAG_RDTUN, - &bxe_interrupt_mode, 0, "Interrupt (MSI-X/MSI/INTx) mode"); +SYSCTL_INT(_hw_bxe, OID_AUTO, interrupt_mode, CTLFLAG_RDTUN, + &bxe_interrupt_mode, 0, "Interrupt (MSI-X/MSI/INTx) mode"); /* Number of Queues: 0 (Auto) or 1 to 16 (fixed queue number) */ static int bxe_queue_count = 4; TUNABLE_INT("hw.bxe.queue_count", &bxe_queue_count); -SYSCTL_UINT(_hw_bxe, OID_AUTO, queue_count, CTLFLAG_RDTUN, - &bxe_queue_count, 0, "Multi-Queue queue count"); +SYSCTL_INT(_hw_bxe, OID_AUTO, queue_count, CTLFLAG_RDTUN, + &bxe_queue_count, 0, "Multi-Queue queue count"); /* max number of buffers per queue (default RX_BD_USABLE) */ -static uint32_t bxe_max_rx_bufs = 0; +static int bxe_max_rx_bufs = 0; TUNABLE_INT("hw.bxe.max_rx_bufs", &bxe_max_rx_bufs); -SYSCTL_UINT(_hw_bxe, OID_AUTO, max_rx_bufs, CTLFLAG_RDTUN, - &bxe_max_rx_bufs, 0, "Maximum Number of Rx Buffers Per Queue"); +SYSCTL_INT(_hw_bxe, OID_AUTO, max_rx_bufs, CTLFLAG_RDTUN, + &bxe_max_rx_bufs, 0, "Maximum Number of Rx Buffers Per Queue"); /* Host interrupt coalescing RX tick timer (usecs) */ -static uint32_t bxe_hc_rx_ticks = 25; +static int bxe_hc_rx_ticks = 25; TUNABLE_INT("hw.bxe.hc_rx_ticks", &bxe_hc_rx_ticks); -SYSCTL_UINT(_hw_bxe, OID_AUTO, hc_rx_ticks, CTLFLAG_RDTUN, - &bxe_hc_rx_ticks, 0, "Host Coalescing Rx ticks"); +SYSCTL_INT(_hw_bxe, OID_AUTO, hc_rx_ticks, CTLFLAG_RDTUN, + &bxe_hc_rx_ticks, 0, "Host Coalescing Rx ticks"); /* Host interrupt coalescing TX tick timer (usecs) */ -static uint32_t bxe_hc_tx_ticks = 50; +static int bxe_hc_tx_ticks = 50; TUNABLE_INT("hw.bxe.hc_tx_ticks", &bxe_hc_tx_ticks); -SYSCTL_UINT(_hw_bxe, OID_AUTO, hc_tx_ticks, CTLFLAG_RDTUN, - &bxe_hc_tx_ticks, 0, "Host Coalescing Tx ticks"); +SYSCTL_INT(_hw_bxe, OID_AUTO, hc_tx_ticks, CTLFLAG_RDTUN, + &bxe_hc_tx_ticks, 0, "Host Coalescing Tx ticks"); /* Maximum number of Rx packets to process at a time */ -static uint32_t bxe_rx_budget = 0xffffffff; +static int bxe_rx_budget = 0xffffffff; TUNABLE_INT("hw.bxe.rx_budget", &bxe_rx_budget); -SYSCTL_UINT(_hw_bxe, OID_AUTO, rx_budget, CTLFLAG_TUN, - &bxe_rx_budget, 0, "Rx processing budget"); +SYSCTL_INT(_hw_bxe, OID_AUTO, rx_budget, CTLFLAG_TUN, + &bxe_rx_budget, 0, "Rx processing budget"); /* Maximum LRO aggregation size */ -static uint32_t bxe_max_aggregation_size = 0; +static int bxe_max_aggregation_size = 0; TUNABLE_INT("hw.bxe.max_aggregation_size", &bxe_max_aggregation_size); -SYSCTL_UINT(_hw_bxe, OID_AUTO, max_aggregation_size, CTLFLAG_TUN, - &bxe_max_aggregation_size, 0, "max aggregation size"); +SYSCTL_INT(_hw_bxe, OID_AUTO, max_aggregation_size, CTLFLAG_TUN, + &bxe_max_aggregation_size, 0, "max aggregation size"); /* PCI MRRS: -1 (Auto), 0 (128B), 1 (256B), 2 (512B), 3 (1KB) */ static int bxe_mrrs = -1; TUNABLE_INT("hw.bxe.mrrs", &bxe_mrrs); -SYSCTL_UINT(_hw_bxe, OID_AUTO, mrrs, CTLFLAG_RDTUN, - &bxe_mrrs, 0, "PCIe maximum read request size"); +SYSCTL_INT(_hw_bxe, OID_AUTO, mrrs, CTLFLAG_RDTUN, + &bxe_mrrs, 0, "PCIe maximum read request size"); /* AutoGrEEEn: 0 (hardware default), 1 (force on), 2 (force off) */ static int bxe_autogreeen = 0; TUNABLE_INT("hw.bxe.autogreeen", &bxe_autogreeen); -SYSCTL_UINT(_hw_bxe, OID_AUTO, autogreeen, CTLFLAG_RDTUN, - &bxe_autogreeen, 0, "AutoGrEEEn support"); +SYSCTL_INT(_hw_bxe, OID_AUTO, autogreeen, CTLFLAG_RDTUN, + &bxe_autogreeen, 0, "AutoGrEEEn support"); /* 4-tuple RSS support for UDP: 0 (disabled), 1 (enabled) */ static int bxe_udp_rss = 0; TUNABLE_INT("hw.bxe.udp_rss", &bxe_udp_rss); -SYSCTL_UINT(_hw_bxe, OID_AUTO, udp_rss, CTLFLAG_RDTUN, - &bxe_udp_rss, 0, "UDP RSS support"); +SYSCTL_INT(_hw_bxe, OID_AUTO, udp_rss, CTLFLAG_RDTUN, + &bxe_udp_rss, 0, "UDP RSS support"); #define STAT_NAME_LEN 32 /* no stat names below can be longer than this */ @@ -3604,10 +3604,10 @@ bxe_watchdog(struct bxe_softc *sc, return (0); } - BXE_FP_TX_UNLOCK(fp); - BLOGE(sc, "TX watchdog timeout on fp[%02d], resetting!\n", fp->index); + BXE_FP_TX_UNLOCK(fp); + atomic_store_rel_long(&sc->chip_tq_flags, CHIP_TQ_REINIT); taskqueue_enqueue(sc->chip_tq, &sc->chip_tq_task); @@ -3652,21 +3652,21 @@ bxe_txeof(struct bxe_softc *sc, tx_bd_avail = bxe_tx_avail(sc, fp); - /* reset the watchdog timer if there are pending transmits */ - if (tx_bd_avail >= BXE_TX_CLEANUP_THRESHOLD) { + if (tx_bd_avail < BXE_TX_CLEANUP_THRESHOLD) { + ifp->if_drv_flags |= IFF_DRV_OACTIVE; + } else { ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; + } - if (tx_bd_avail >= (TX_BD_USABLE - 1)) { - /* clear watchdog if the tx chain is empty */ - fp->watchdog_timer = 0; - return (FALSE); - } - - /* reset watchdog if there are pending transmits */ + if (fp->tx_pkt_prod != fp->tx_pkt_cons) { + /* reset the watchdog timer if there are pending transmits */ fp->watchdog_timer = BXE_TX_TIMEOUT; + return (TRUE); + } else { + /* clear watchdog when there are no pending transmits */ + fp->watchdog_timer = 0; + return (FALSE); } - - return (TRUE); } static void @@ -5879,13 +5879,11 @@ bxe_tx_start_locked(struct bxe_softc /* handle any completions if we're running low */ if (tx_bd_avail < BXE_TX_CLEANUP_THRESHOLD) { + /* bxe_txeof will set IFF_DRV_OACTIVE appropriately */ bxe_txeof(sc, fp); - } - - /* close TX if we're still running low */ - if (tx_bd_avail < BXE_TX_CLEANUP_THRESHOLD) { - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - break; + if (ifp->if_drv_flags & IFF_DRV_OACTIVE) { + break; + } } } @@ -6008,13 +6006,11 @@ bxe_tx_mq_start_locked(struct bxe_softc /* handle any completions if we're running low */ if (tx_bd_avail < BXE_TX_CLEANUP_THRESHOLD) { + /* bxe_txeof will set IFF_DRV_OACTIVE appropriately */ bxe_txeof(sc, fp); - } - - /* close TX if we're still running low */ - if (tx_bd_avail < BXE_TX_CLEANUP_THRESHOLD) { - ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; - break; + if (ifp->if_drv_flags & IFF_DRV_OACTIVE) { + break; + } } next = drbr_dequeue(ifp, tx_br); @@ -14173,7 +14169,7 @@ bxe_get_tunable_params(struct bxe_softc BLOGD(sc, DBG_LOAD, "User Config: " - "debug=0x%x " + "debug=0x%lx " "interrupt_mode=%d " "queue_count=%d " "hc_rx_ticks=%d " Modified: stable/10/sys/dev/bxe/bxe.h ============================================================================== --- stable/10/sys/dev/bxe/bxe.h Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/bxe.h Sat Nov 16 00:31:32 2013 (r258203) @@ -748,6 +748,9 @@ struct bxe_fastpath { #define BXE_VF_ID_INVALID 0xFF #define IS_SRIOV(sc) 0 +#define GET_NUM_VFS_PER_PATH(sc) 0 +#define GET_NUM_VFS_PER_PF(sc) 0 + /* maximum number of fast-path interrupt contexts */ #define FP_SB_MAX_E1x 16 #define FP_SB_MAX_E2 HC_SB_MAX_SB_E2 @@ -1405,7 +1408,7 @@ struct bxe_softc { #define BXE_MF_FUNC_DIS 0x00000800 #define BXE_TX_SWITCHING 0x00001000 - uint32_t debug; /* per-instance debug logging config */ + unsigned long debug; /* per-instance debug logging config */ #define MAX_BARS 5 struct bxe_bar bar[MAX_BARS]; /* map BARs 0, 2, 4 */ @@ -1603,7 +1606,7 @@ struct bxe_softc { int max_rx_bufs; int hc_rx_ticks; int hc_tx_ticks; - uint32_t rx_budget; + int rx_budget; int max_aggregation_size; int mrrs; int autogreeen; Modified: stable/10/sys/dev/bxe/bxe_elink.c ============================================================================== --- stable/10/sys/dev/bxe/bxe_elink.c Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/bxe_elink.c Sat Nov 16 00:31:32 2013 (r258203) @@ -607,6 +607,7 @@ Theotherbitsarereservedandshouldbezero*/ #define MDIO_WC_REG_RX1_PCI_CTRL 0x80ca #define MDIO_WC_REG_RX2_PCI_CTRL 0x80da #define MDIO_WC_REG_RX3_PCI_CTRL 0x80ea +#define MDIO_WC_REG_RXB_ANA_RX_CONTROL_PCI 0x80fa #define MDIO_WC_REG_XGXSBLK2_UNICORE_MODE_10G 0x8104 #define MDIO_WC_REG_XGXS_STATUS3 0x8129 #define MDIO_WC_REG_PAR_DET_10G_STATUS 0x8130 @@ -4632,6 +4633,19 @@ static void elink_warpcore_enable_AN_KR( elink_warpcore_enable_AN_KR2(phy, params, vars); } else { + /* Enable Auto-Detect to support 1G over CL37 as well */ + elink_cl45_write(sc, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_SERDESDIGITAL_CONTROL1000X1, 0x10); + + /* Force cl48 sync_status LOW to avoid getting stuck in CL73 + * parallel-detect loop when CL73 and CL37 are enabled. + */ + CL22_WR_OVER_CL45(sc, phy, MDIO_REG_BANK_AER_BLOCK, + MDIO_AER_BLOCK_AER_REG, 0); + elink_cl45_write(sc, phy, MDIO_WC_DEVAD, + MDIO_WC_REG_RXB_ANA_RX_CONTROL_PCI, 0x0800); + elink_set_aer_mmd(params, phy); + elink_disable_kr2(params, vars, phy); } @@ -7317,10 +7331,8 @@ static elink_status_t elink_link_initial (CHIP_IS_E1x(sc) || CHIP_IS_E2(sc))) elink_set_parallel_detection(phy, params); - if (params->phy[ELINK_INT_PHY].config_init) - params->phy[ELINK_INT_PHY].config_init(phy, - params, - vars); + if (params->phy[ELINK_INT_PHY].config_init) + params->phy[ELINK_INT_PHY].config_init(phy, params, vars); } /* Re-read this value in case it was changed inside config_init due to @@ -8904,17 +8916,20 @@ static elink_status_t elink_get_edc_mode *edc_mode = ELINK_EDC_MODE_ACTIVE_DAC; else check_limiting_mode = 1; - } else if (copper_module_type & - ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE) { - ELINK_DEBUG_P0(sc, - "Passive Copper cable detected\n"); - *edc_mode = - ELINK_EDC_MODE_PASSIVE_DAC; } else { - ELINK_DEBUG_P1(sc, - "Unknown copper-cable-type 0x%x !!!\n", - copper_module_type); - return ELINK_STATUS_ERROR; + *edc_mode = ELINK_EDC_MODE_PASSIVE_DAC; + /* Even in case PASSIVE_DAC indication is not set, + * treat it as a passive DAC cable, since some cables + * don't have this indication. + */ + if (copper_module_type & + ELINK_SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE) { + ELINK_DEBUG_P0(sc, + "Passive Copper cable detected\n"); + } else { + ELINK_DEBUG_P0(sc, + "Unknown copper-cable-type\n"); + } } break; } @@ -14360,6 +14375,10 @@ static uint8_t elink_analyze_link_error( ELINK_DEBUG_P3(sc, "Link changed:[%x %x]->%x\n", vars->link_up, old_status, status); + /* Do not touch the link in case physical link down */ + if ((vars->phy_flags & PHY_PHYSICAL_LINK_FLAG) == 0) + return 1; + /* a. Update shmem->link_status accordingly * b. Update elink_vars->link_up */ Modified: stable/10/sys/dev/bxe/ecore_hsi.h ============================================================================== --- stable/10/sys/dev/bxe/ecore_hsi.h Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/ecore_hsi.h Sat Nov 16 00:31:32 2013 (r258203) @@ -1057,6 +1057,9 @@ struct port_feat_cfg { /* port 0: 0 #define PORT_FEATURE_MBA_VLAN_TAG_MASK 0x0000FFFF #define PORT_FEATURE_MBA_VLAN_TAG_SHIFT 0 #define PORT_FEATURE_MBA_VLAN_EN 0x00010000 + #define PORT_FEATUTE_BOFM_CFGD_EN 0x00020000 + #define PORT_FEATURE_BOFM_CFGD_FTGT 0x00040000 + #define PORT_FEATURE_BOFM_CFGD_VEN 0x00080000 uint32_t Reserved1; uint32_t smbus_config; @@ -1099,8 +1102,8 @@ struct port_feat_cfg { /* port 0: 0 #define PORT_FEATURE_LINK_SPEED_MASK 0x000F0000 #define PORT_FEATURE_LINK_SPEED_SHIFT 16 #define PORT_FEATURE_LINK_SPEED_AUTO 0x00000000 - #define PORT_FEATURE_LINK_SPEED_10M_FULL 0x00010000 - #define PORT_FEATURE_LINK_SPEED_10M_HALF 0x00020000 + #define PORT_FEATURE_LINK_SPEED_10M_HALF 0x00010000 + #define PORT_FEATURE_LINK_SPEED_10M_FULL 0x00020000 #define PORT_FEATURE_LINK_SPEED_100M_HALF 0x00030000 #define PORT_FEATURE_LINK_SPEED_100M_FULL 0x00040000 #define PORT_FEATURE_LINK_SPEED_1G 0x00050000 @@ -1654,6 +1657,7 @@ struct drv_func_mb { #define DRV_MSG_CODE_LOAD_REQ_FORCE_LFA 0x00002000 #define DRV_MSG_CODE_USR_BLK_IMAGE_REQ 0x00000001 + #define DRV_MSG_CODE_ISCSI_PERS_IMAGE_REQ 0x00000002 uint32_t fw_mb_header; #define FW_MSG_CODE_MASK 0xffff0000 @@ -2558,6 +2562,8 @@ struct shmem2_region { uint32_t drv_func_info_size; /* Offset 0x150 */ uint32_t link_attr_sync[PORT_MAX]; /* Offset 0x154 */ #define LINK_ATTR_SYNC_KR2_ENABLE (1<<0) + + uint32_t ibft_host_addr_hi; /* Initialize by uEFI ROM */ }; Modified: stable/10/sys/dev/bxe/ecore_init.h ============================================================================== --- stable/10/sys/dev/bxe/ecore_init.h Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/ecore_init.h Sat Nov 16 00:31:32 2013 (r258203) @@ -717,23 +717,35 @@ static const struct { * [30] MCP Latched ump_tx_parity * [31] MCP Latched scpad_parity */ -#define MISC_AEU_ENABLE_MCP_PRTY_BITS \ +#define MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS \ (AEU_INPUTS_ATTN_BITS_MCP_LATCHED_ROM_PARITY | \ AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_RX_PARITY | \ - AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY | \ + AEU_INPUTS_ATTN_BITS_MCP_LATCHED_UMP_TX_PARITY) + +#define MISC_AEU_ENABLE_MCP_PRTY_BITS \ + (MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS | \ AEU_INPUTS_ATTN_BITS_MCP_LATCHED_SCPAD_PARITY) /* Below registers control the MCP parity attention output. When * MISC_AEU_ENABLE_MCP_PRTY_BITS are set - attentions are * enabled, when cleared - disabled. */ -static const uint32_t mcp_attn_ctl_regs[] = { - MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, - MISC_REG_AEU_ENABLE4_NIG_0, - MISC_REG_AEU_ENABLE4_PXP_0, - MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, - MISC_REG_AEU_ENABLE4_NIG_1, - MISC_REG_AEU_ENABLE4_PXP_1 +static const struct { + uint32_t addr; + uint32_t bits; +} mcp_attn_ctl_regs[] = { + { MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0, + MISC_AEU_ENABLE_MCP_PRTY_BITS }, + { MISC_REG_AEU_ENABLE4_NIG_0, + MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, + { MISC_REG_AEU_ENABLE4_PXP_0, + MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, + { MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0, + MISC_AEU_ENABLE_MCP_PRTY_BITS }, + { MISC_REG_AEU_ENABLE4_NIG_1, + MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS }, + { MISC_REG_AEU_ENABLE4_PXP_1, + MISC_AEU_ENABLE_MCP_PRTY_SUB_BITS } }; static inline void ecore_set_mcp_parity(struct bxe_softc *sc, uint8_t enable) @@ -742,14 +754,14 @@ static inline void ecore_set_mcp_parity( uint32_t reg_val; for (i = 0; i < ARRSIZE(mcp_attn_ctl_regs); i++) { - reg_val = REG_RD(sc, mcp_attn_ctl_regs[i]); + reg_val = REG_RD(sc, mcp_attn_ctl_regs[i].addr); if (enable) - reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; + reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; /* Linux is using mcp_attn_ctl_regs[i].bits */ else - reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; + reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; /* Linux is using mcp_attn_ctl_regs[i].bits */ - REG_WR(sc, mcp_attn_ctl_regs[i], reg_val); + REG_WR(sc, mcp_attn_ctl_regs[i].addr, reg_val); } } Modified: stable/10/sys/dev/bxe/ecore_reg.h ============================================================================== --- stable/10/sys/dev/bxe/ecore_reg.h Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/ecore_reg.h Sat Nov 16 00:31:32 2013 (r258203) @@ -3384,6 +3384,7 @@ Theotherbitsarereservedandshouldbezero*/ #define MDIO_WC_REG_RX1_PCI_CTRL 0x80ca #define MDIO_WC_REG_RX2_PCI_CTRL 0x80da #define MDIO_WC_REG_RX3_PCI_CTRL 0x80ea +#define MDIO_WC_REG_RXB_ANA_RX_CONTROL_PCI 0x80fa #define MDIO_WC_REG_XGXSBLK2_UNICORE_MODE_10G 0x8104 #define MDIO_WC_REG_XGXS_STATUS3 0x8129 #define MDIO_WC_REG_PAR_DET_10G_STATUS 0x8130 Modified: stable/10/sys/dev/bxe/ecore_sp.c ============================================================================== --- stable/10/sys/dev/bxe/ecore_sp.c Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/ecore_sp.c Sat Nov 16 00:31:32 2013 (r258203) @@ -168,16 +168,6 @@ static inline void __ecore_exe_queue_res } } -static inline void ecore_exe_queue_reset_pending(struct bxe_softc *sc, - struct ecore_exe_queue_obj *o) -{ - ECORE_SPIN_LOCK_BH(&o->lock); - - __ecore_exe_queue_reset_pending(sc, o); - - ECORE_SPIN_UNLOCK_BH(&o->lock); -} - /** * ecore_exe_queue_step - execute one execution chunk atomically * @@ -188,7 +178,6 @@ static inline void ecore_exe_queue_reset * (Should be called while holding the exe_queue->lock). */ static inline int ecore_exe_queue_step(struct bxe_softc *sc, - struct ecore_vlan_mac_obj *vobj, struct ecore_exe_queue_obj *o, unsigned long *ramrod_flags) { @@ -491,7 +480,7 @@ static void __ecore_vlan_mac_h_exec_pend ramrod_flags); o->head_exe_request = FALSE; o->saved_ramrod_flags = 0; - rc = ecore_exe_queue_step(sc, o, &o->exe_queue, &ramrod_flags); + rc = ecore_exe_queue_step(sc, &o->exe_queue, &ramrod_flags); if (rc != ECORE_SUCCESS) { ECORE_ERR("execution of pending commands failed with rc %d\n", rc); @@ -667,7 +656,8 @@ static int ecore_get_n_elements(struct b { struct ecore_vlan_mac_registry_elem *pos; uint8_t *next = base; - int counter = 0, read_lock; + int counter = 0; + int read_lock; ECORE_MSG(sc, "get_n_elements - taking vlan_mac_lock (reader)\n"); read_lock = ecore_vlan_mac_h_read_lock(sc, o); @@ -680,7 +670,7 @@ static int ecore_get_n_elements(struct b if (counter < n) { ECORE_MEMCPY(next, &pos->u, size); counter++; - ECORE_MSG(sc, "copied element number %d to address %p element was:", + ECORE_MSG(sc, "copied element number %d to address %p element was:\n", counter, next); next += stride + size; } @@ -1669,7 +1659,7 @@ static int __ecore_vlan_mac_execute_step */ rc = ECORE_PENDING; } else { - rc = ecore_exe_queue_step(sc, o, &o->exe_queue, ramrod_flags); + rc = ecore_exe_queue_step(sc, &o->exe_queue, ramrod_flags); } ECORE_SPIN_UNLOCK_BH(&o->exe_queue.lock); @@ -1693,12 +1683,19 @@ static int ecore_complete_vlan_mac(struc struct ecore_raw_obj *r = &o->raw; int rc; + /* Clearing the pending list & raw state should be made + * atomically (as execution flow assumes they represent the same) + */ + ECORE_SPIN_LOCK_BH(&o->exe_queue.lock); + /* Reset pending list */ - ecore_exe_queue_reset_pending(sc, &o->exe_queue); + __ecore_exe_queue_reset_pending(sc, &o->exe_queue); /* Clear pending */ r->clear_pending(r); + ECORE_SPIN_UNLOCK_BH(&o->exe_queue.lock); + /* If ramrod failed this is most likely a SW bug */ if (cqe->message.error) return ECORE_INVAL; @@ -1857,6 +1854,7 @@ static int ecore_execute_vlan_mac(struct * and exit. Otherwise send a ramrod to FW. */ if (!drv_only) { + ECORE_DBG_BREAK_IF(r->check_pending(r)); /* Set pending */ r->set_pending(r); @@ -2090,10 +2088,11 @@ static int ecore_vlan_mac_del_all(struct unsigned long *ramrod_flags) { struct ecore_vlan_mac_registry_elem *pos = NULL; - int rc = 0, read_lock; struct ecore_vlan_mac_ramrod_params p; struct ecore_exe_queue_obj *exeq = &o->exe_queue; struct ecore_exeq_elem *exeq_pos, *exeq_pos_n; + int read_lock; + int rc = 0; /* Clear pending commands first */ @@ -2529,7 +2528,8 @@ static int ecore_set_rx_mode_e2(struct b ETH_FILTER_RULES_CMD_TX_CMD; ecore_rx_mode_set_cmd_state_e2(sc, &p->tx_accept_flags, - &(data->rules[rule_idx++]), FALSE); + &(data->rules[rule_idx++]), + FALSE); } /* Rx */ @@ -2541,7 +2541,8 @@ static int ecore_set_rx_mode_e2(struct b ETH_FILTER_RULES_CMD_RX_CMD; ecore_rx_mode_set_cmd_state_e2(sc, &p->rx_accept_flags, - &(data->rules[rule_idx++]), FALSE); + &(data->rules[rule_idx++]), + FALSE); } /* If FCoE Queue configuration has been requested configure the Rx and @@ -2559,10 +2560,10 @@ static int ecore_set_rx_mode_e2(struct b data->rules[rule_idx].cmd_general_data = ETH_FILTER_RULES_CMD_TX_CMD; - ecore_rx_mode_set_cmd_state_e2(sc, - &p->tx_accept_flags, - &(data->rules[rule_idx++]), + ecore_rx_mode_set_cmd_state_e2(sc, &p->tx_accept_flags, + &(data->rules[rule_idx]), TRUE); + rule_idx++; } /* Rx */ @@ -2573,10 +2574,10 @@ static int ecore_set_rx_mode_e2(struct b data->rules[rule_idx].cmd_general_data = ETH_FILTER_RULES_CMD_RX_CMD; - ecore_rx_mode_set_cmd_state_e2(sc, - &p->rx_accept_flags, - &(data->rules[rule_idx++]), + ecore_rx_mode_set_cmd_state_e2(sc, &p->rx_accept_flags, + &(data->rules[rule_idx]), TRUE); + rule_idx++; } } @@ -2718,7 +2719,7 @@ static int ecore_mcast_enqueue_cmd(struc if (!new_cmd) return ECORE_NOMEM; - ECORE_MSG(sc, "About to enqueue a new %d command. macs_list_len=%d\n", \ + ECORE_MSG(sc, "About to enqueue a new %d command. macs_list_len=%d\n", cmd, macs_list_len); ECORE_LIST_INIT(&new_cmd->data.macs_head); @@ -4259,9 +4260,22 @@ void ecore_init_mac_credit_pool(struct b * CAM credit is equaly divided between all active functions * on the PATH. */ - if ((func_num > 0)) { + if ((func_num > 1)) { if (!CHIP_REV_IS_SLOW(sc)) - cam_sz = (MAX_MAC_CREDIT_E2 / func_num); + cam_sz = (MAX_MAC_CREDIT_E2 + - GET_NUM_VFS_PER_PATH(sc)) + / func_num + + GET_NUM_VFS_PER_PF(sc); + else + cam_sz = ECORE_CAM_SIZE_EMUL; + + /* No need for CAM entries handling for 57712 and + * newer. + */ + ecore_init_credit_pool(p, -1, cam_sz); + } else if (func_num == 1) { + if (!CHIP_REV_IS_SLOW(sc)) + cam_sz = MAX_MAC_CREDIT_E2; else cam_sz = ECORE_CAM_SIZE_EMUL; @@ -4332,6 +4346,10 @@ static int ecore_setup_rss(struct bxe_so rss_mode = ETH_RSS_MODE_DISABLED; else if (ECORE_TEST_BIT(ECORE_RSS_MODE_REGULAR, &p->rss_flags)) rss_mode = ETH_RSS_MODE_REGULAR; +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 55000) /* ! BNX2X_UPSTREAM */ + else if (ECORE_TEST_BIT(ECORE_RSS_MODE_ESX51, &p->rss_flags)) + rss_mode = ETH_RSS_MODE_ESX51; +#endif data->rss_mode = rss_mode; @@ -4456,6 +4474,16 @@ void ecore_init_rss_config_obj(struct bx rss_obj->config_rss = ecore_setup_rss; } +int validate_vlan_mac(struct bxe_softc *sc, + struct ecore_vlan_mac_obj *vlan_mac) +{ + if (!vlan_mac->get_n_elements) { + ECORE_ERR("vlan mac object was not intialized\n"); + return ECORE_INVAL; + } + return 0; +} + /********************** Queue state object ***********************************/ /** Modified: stable/10/sys/dev/bxe/ecore_sp.h ============================================================================== --- stable/10/sys/dev/bxe/ecore_sp.h Fri Nov 15 23:48:51 2013 (r258202) +++ stable/10/sys/dev/bxe/ecore_sp.h Sat Nov 16 00:31:32 2013 (r258203) @@ -1148,6 +1148,9 @@ enum { ECORE_RSS_IPV6_UDP, ECORE_RSS_TUNNELING, +#if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 55000) /* ! BNX2X_UPSTREAM */ + ECORE_RSS_MODE_ESX51, +#endif }; struct ecore_config_rss_params { @@ -1857,6 +1860,9 @@ int ecore_config_rss(struct bxe_softc *s void ecore_get_rss_ind_table(struct ecore_rss_config_obj *rss_obj, uint8_t *ind_table); +/* set as inline so printout will show the offending function */ +int validate_vlan_mac(struct bxe_softc *sc, + struct ecore_vlan_mac_obj *vlan_mac); #endif /* ECORE_SP_H */