From owner-cvs-src-old@FreeBSD.ORG Tue May 17 22:36:42 2011 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9A8831065679 for ; Tue, 17 May 2011 22:36:42 +0000 (UTC) (envelope-from jkim@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 6BD0A8FC25 for ; Tue, 17 May 2011 22:36:42 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.4/8.14.4) with ESMTP id p4HMagJE053935 for ; Tue, 17 May 2011 22:36:42 GMT (envelope-from jkim@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.4/8.14.4/Submit) id p4HMaghQ053934 for cvs-src-old@freebsd.org; Tue, 17 May 2011 22:36:42 GMT (envelope-from jkim@repoman.freebsd.org) Message-Id: <201105172236.p4HMaghQ053934@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to jkim@repoman.freebsd.org using -f From: Jung-uk Kim Date: Tue, 17 May 2011 22:36:16 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/amd64/amd64 identcpu.c src/sys/amd64/include specialreg.h src/sys/i386/i386 identcpu.c src/sys/i386/include specialreg.h X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 May 2011 22:36:42 -0000 jkim 2011-05-17 22:36:16 UTC FreeBSD src repository Modified files: sys/amd64/amd64 identcpu.c sys/amd64/include specialreg.h sys/i386/i386 identcpu.c sys/i386/include specialreg.h Log: SVN rev 222043 on 2011-05-17 22:36:16Z by jkim Update CPUID bits to reflect AMD Bulldozer and Intel Sandy Bridge features. Note AMD dropped SSE5 extensions in order to avoid ISA overlap with Intel AVX instructions. The SSE5 bit was recycled as XOP extended instruction bit, CVT16 was deprecated in favor of F16C (half-precision float conversion instructions for AVX), and the remaining FMA4 (4-operand FMA instructions) gained a separate CPUID bit. Replace non-existent references with today's CPUID specifications. Revision Changes Path 1.191 +26 -27 src/sys/amd64/amd64/identcpu.c 1.74 +12 -1 src/sys/amd64/include/specialreg.h 1.221 +25 -27 src/sys/i386/i386/identcpu.c 1.72 +12 -1 src/sys/i386/include/specialreg.h