From owner-freebsd-mips@freebsd.org Thu Jan 11 00:57:05 2018 Return-Path: Delivered-To: freebsd-mips@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 038CBEA4F79 for ; Thu, 11 Jan 2018 00:57:05 +0000 (UTC) (envelope-from mips@inferiorhumanorgans.com) Received: from gaz.inferiorhumanorgans.com (198-27-242-154.fiber.dynamic.sonic.net [198.27.242.154]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "gaz.inferiorhumanorgans.com", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id E184B760BC for ; Thu, 11 Jan 2018 00:57:04 +0000 (UTC) (envelope-from mips@inferiorhumanorgans.com) Received: from gaz.inferiorhumanorgans.com (localhost [127.0.0.1]) by gaz.inferiorhumanorgans.com (Postfix) with ESMTP id EA7AF656E8 for ; Wed, 10 Jan 2018 16:49:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed; d=inferiorhumanorgans.com; h=date:from:to:subject:message-id:mime-version:content-type :in-reply-to; s=mail; bh=GSnGcgcyG+mBVDeyQ6UVsEGFm2bitUaiCvZkIvs NRXI=; b=rm8qVymn4L5Pzh3lKZh1vQGUaLRR7Ct5fsR/57AJf/d1O8bsmhWRT8S QvY4PIfg3n+S9X3iPZ3grmjluphQLJhk6nCGQhSWNqcZr2UbVK1Q9BUAE/qWFuAh qncWxrPqrPWARljJqnThJtQIZpx8rP5LUEMJ6drIvUJoJLZN+s+A= DomainKey-Signature: a=rsa-sha1; c=nofws; d=inferiorhumanorgans.com; h= date:from:to:subject:message-id:mime-version:content-type :in-reply-to; q=dns; s=mail; b=t9Y6sqTDwl5Y7NXhS3MA0zFoMvuuJd3+y 1Vp+yVjsdpDVV3JlQurWNJjAl312+z+8WPVjlRcXxXEaokJUb5taKf72K0KaAPa3 t/JjK8yZRWFEC+xIjnGfPUwIF7Z/HXccg2Eh4xSg2x1JC0+/+LBJOYhv1TC7nWRN 1F2jBuYAK4= Received: by gaz.inferiorhumanorgans.com (Postfix, from userid 1001) id DEDC2656E7; Wed, 10 Jan 2018 16:49:29 -0800 (PST) Authentication-Results: gaz.inferiorhumanorgans.com; dkim=none Date: Wed, 10 Jan 2018 16:49:29 -0800 From: Alex Zepeda To: freebsd-mips@freebsd.org Subject: Re: Switch to hard-float by default? Message-ID: <20180111004929.GA17499@bloaty> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.2 (2017-12-15) X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Jan 2018 00:57:05 -0000 > On Wed, Jan 10, 2018 at 12:54 PM, John Baldwin wrote: > > > I have been working on LLVM libunwind patches for MIPS and the last round > > has > > been to teach the unwinder to handle hard-float. As part of this I just > > fixed > > a bug which had broken HF support for N32 (in review now), and I have a > > working 'mipsn32hf' world that boots under qemu. However, if I add > > 'mipsn32hf' to the list of known targets that is yet another world to add > > to make universe. I wonder if instead we should consider switching MIPS to > > assume hard-float by default? We made that change for 32-bit arm recently. > > > > The simplest approach would be to add 'mipsn32hf' and then remove all the > > non '*hf' targets from Makefile.inc1 (if we only wanted to support HF). A > > more drastic approach would be to change the existing 'mips*' targets to > > assume hard-float, remove all the '*hf' targets (which are only in 12 > > anyway > > I think?) and add in explicit '*sf' targets if anyone has a need for them. > > Given that none of the *hf targets have been MFC'd are only present in 12 > > anyway, maybe the more drastic route is actually better? If we do go that > > route, does anyone have a use case for a '*sf' target? That is, is anyone > > running FreeBSD/mips on a processor that does not include an FPA? > > > > I think that I retired the last set of SoCs that only had soft float. > > I think this is a good idea. > > The only use case I can think of is if I'm wrong and some of the early > Atheros SoCs can do soft float. But then we'd just have one supported > soft-float platform to worry about rather than the full generality we have > now. > > Warner Are you sure? I'm pretty sure a lot of the 32 bit SoCs don't have FPUs standard. I'm currently poking at a MediaTek 7621 board (EdgeRouter X) and it doesn't have an FPU. Looking through the MediaTek documents it looks like FPUs are an optional accessory on many of their SoCs. AZ